Optimizing Device Metal Routing Layouts by the Simulation Tool
Device layout is very important for one Integrated Circuit (IC) performance. From different metal routing, ICs can own different achievements. In this study, simple device layouts with only two poly gate fingers are discovered for obtaining the optimizing device characteristics. In order to create t...
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Published in | 2023 International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan) pp. 219 - 220 |
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Main Authors | , , , , , , , , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
17.07.2023
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Subjects | |
Online Access | Get full text |
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Abstract | Device layout is very important for one Integrated Circuit (IC) performance. From different metal routing, ICs can own different achievements. In this study, simple device layouts with only two poly gate fingers are discovered for obtaining the optimizing device characteristics. In order to create the uniform current distributions, lots of metal routing segmentations are preferred, but many segmented metal layouts will induce less effective metal widths. Through the simulation tool, optimizing metal routing can be achieved. Finally, one suggested metal routing method for typical IC applications can be obtained from many simulation results. |
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AbstractList | Device layout is very important for one Integrated Circuit (IC) performance. From different metal routing, ICs can own different achievements. In this study, simple device layouts with only two poly gate fingers are discovered for obtaining the optimizing device characteristics. In order to create the uniform current distributions, lots of metal routing segmentations are preferred, but many segmented metal layouts will induce less effective metal widths. Through the simulation tool, optimizing metal routing can be achieved. Finally, one suggested metal routing method for typical IC applications can be obtained from many simulation results. |
Author | Lee, Jian-Hsing Chen, Ke-Horng Chen, Lin-Fan Chen, Chun-Chih Ho, Kuan-I Huang, Shao-Chang Wang, Chien-Wei Liao, Chih-Cherng Chuang, Jung-Tsun Chang, Che-Hua Li, Ching-Ho Yang, Hsiao-Ying Lao, Chung-Ren Lin, Gong-Kai |
Author_xml | – sequence: 1 givenname: Shao-Chang surname: Huang fullname: Huang, Shao-Chang organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 2 givenname: Ching-Ho surname: Li fullname: Li, Ching-Ho organization: National Yang Ming Chiao Tung University,Institute of Electrical and Control Engineering,Hsinchu,Taiwan – sequence: 3 givenname: Chih-Cherng surname: Liao fullname: Liao, Chih-Cherng organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 4 givenname: Jung-Tsun surname: Chuang fullname: Chuang, Jung-Tsun organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 5 givenname: Chien-Wei surname: Wang fullname: Wang, Chien-Wei organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 6 givenname: Gong-Kai surname: Lin fullname: Lin, Gong-Kai organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 7 givenname: Lin-Fan surname: Chen fullname: Chen, Lin-Fan organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 8 givenname: Chun-Chih surname: Chen fullname: Chen, Chun-Chih organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 9 givenname: Kuan-I surname: Ho fullname: Ho, Kuan-I organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 10 givenname: Che-Hua surname: Chang fullname: Chang, Che-Hua organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 11 givenname: Hsiao-Ying surname: Yang fullname: Yang, Hsiao-Ying organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 12 givenname: Chung-Ren surname: Lao fullname: Lao, Chung-Ren organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 13 givenname: Jian-Hsing surname: Lee fullname: Lee, Jian-Hsing organization: Vanguard International Semiconductor Corporation,Hsinchu,Taiwan – sequence: 14 givenname: Ke-Horng surname: Chen fullname: Chen, Ke-Horng organization: National Yang Ming Chiao Tung University,Institute of Electrical and Control Engineering,Hsinchu,Taiwan |
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Snippet | Device layout is very important for one Integrated Circuit (IC) performance. From different metal routing, ICs can own different achievements. In this study,... |
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SubjectTerms | Fingers Integrated circuits Layout Metals Performance evaluation Resistance Simulation |
Title | Optimizing Device Metal Routing Layouts by the Simulation Tool |
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