8.4 A Fast-Transient 3-Fine-Level Buck-Boost Hybrid DC-DC Converter with Half-Voltage-Stress on All Switches and 98.2% Peak Efficiency

• Published in: 2024 IEEE International Solid-State Circuits Conference (ISSCC) Vol. 67; pp. 150 - 152
• Main Authors: Zhao, Shuangxing, Zhan, Chenchang, Lu, Yan
• Format: Conference Proceeding
• Language: English
• Published: IEEE 18.02.2024
• Subjects: DC-DC power converters; High-voltage techniques; Limiting; Lithium-ion batteries; Modulation; Switches; Transient response
• DOI: 10.1109/ISSCC49657.2024.10454536

Buck-boost DC-DC converter plays an important role in battery-powered devices, as Li-ion battery outputs 4.2V to 2.8V while high-performance analog circuits require a relatively high supply of 3.3V. More importantly, an envelope supply modulator needs a buck-boost converter with wide and fast dynamics. A conventional buck-boost (CBB) converter has two main drawbacks: 1) all its four power switches need to withstand the highest voltage rating to cover the input/output voltage ranges, limiting the power conversion efficiency; 2) its inherent right-half-plane (RHP) zero limits the transient response speed. New topologies with flying capacitor \left({\mathrm {C}}_{\mathrm {F}}\right) [1, 2] have been proposed to reduce the conduction loss by removing one switch in the main current path. However, during the mode transitions in [1, 2], the \mathrm{C}_{\mathrm{F}} voltage would fluctuate, leading to significant charging or discharging currents that can create substantial current/voltage spikes and energy losses. Topologies in [3, 4] require only one mode for the entire operating range. Meanwhile, some topologies need LDMOS or stacked transistors for withstanding high-voltage stress, such as \mathrm{V}_{\text{IN}}+\mathrm{V}_{\text{OUT}} in [1], 2 \mathrm{~V}_{\text{OUT}} in [3], or 2 \mathrm{~V}_{\text{IN}} in [4], which degrades the efficiency and increases fabrication cost. Still, these topologies exhibit slow transient response. To address this, [5, 6] propose buck-based topologies that eliminate the RHP zero. However, their efficiency is compromised by the additional switch in the main current path.