Instruction buffering exploration for low energy VLIWs with instruction clusters

For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, sofrwcre controlled clustered loop buffers are energy efficient. However current compilers for VLIW do not fully exploit the potentials offered b...

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Bibliographic Details
Published inASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753) pp. 825 - 830
Main Authors Vander An, T., Jayapala, M., Barat, F., Deconinck, G., Lauwereins, R., Catthoor, F., Corporaal, H.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2004
Subjects
Application specific processors
Buffer storage
Clustering algorithms
Data mining
Embedded system
Energy consumption
Energy efficiency
Multimedia systems
Registers
VLIW
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Summary:For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, sofrwcre controlled clustered loop buffers are energy efficient. However current compilers for VLIW do not fully exploit the potentials offered by such a clustered organization This paper presents an algorithm to explore what is the optimal loop huffer configuration and the optimal way to use this configuration for an application or a set of applications. Results for the MediaBeneh application suite show an additional 18% reduction (on average) in energy in the instruction memory hierarchy as compared to traditional nonclustered approaches to the loop huffer without compromising performance.
ISBN:0780381750
9780780381759
DOI:10.1109/ASPDAC.2004.1337708