Easily testable VLSI design intelligent selection and insertion system DISIS

• Published in: 1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105) pp. 536 - 539
• Main Authors: Peng Xinguang, Bai Fenge, Meng Zhaoguang
• Format: Conference Proceeding
• Language: English
• Published: IEEE 1998
• Subjects: Circuit testing; Controllability; Cost function; Design for testability; Hardware; Intelligent systems; Observability; Shift registers; System testing; Very large scale integration
• DOI: 10.1109/ICSICT.1998.785940
• ISBN: 0780343069; 9780780343061

DISIS is a knowledge based intelligent system that advises the VLSI designers on selecting and inserting the best design for testability (DFT) for a particular VLSI circuit to satisfy a set of parameter requirements and design goals. The DISIS system is different from the previous approaches in three main aspects. The DFT techniques are inserted only to the critical ports identified by testability analysis. The multiple description and a new cost evaluation function are introduced to the DISIS system.