Electromagnetic analysis and fault injection onto secure circuits
Implementation attacks are a major threat to hardware cryptographic implementations. These attacks exploit the correlation existing between the computed data and variables such as computation time, consumed power, and electromagnetic (EM) emissions. Recently, the EM channel has been proven as an eff...
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Published in | IEEE/IFIP ... International Conference on VLSI and System-on-Chip (Print) pp. 1 - 6 |
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Main Authors | , , , , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.10.2014
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Abstract | Implementation attacks are a major threat to hardware cryptographic implementations. These attacks exploit the correlation existing between the computed data and variables such as computation time, consumed power, and electromagnetic (EM) emissions. Recently, the EM channel has been proven as an effective passive and active attack technique against secure implementations. In this paper, we resume the recent results obtained on this subject, with a particular focus on EM as a fault injection tool. |
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AbstractList | Implementation attacks are a major threat to hardware cryptographic implementations. These attacks exploit the correlation existing between the computed data and variables such as computation time, consumed power, and electromagnetic (EM) emissions. Recently, the EM channel has been proven as an effective passive and active attack technique against secure implementations. In this paper, we resume the recent results obtained on this subject, with a particular focus on EM as a fault injection tool. |
Author | Maurine, P. Lisart, M. Bossuet, L. Maistri, P. Moro, N. Fischer, V. Robisson, B. Aubert, A. Dutertre, J.-M Leveugle, R. |
Author_xml | – sequence: 1 givenname: P. surname: Maistri fullname: Maistri, P. email: paolo.maistri@imag.fr organization: TIMA, Univ. Grenoble Alpes, Grenoble, France – sequence: 2 givenname: R. surname: Leveugle fullname: Leveugle, R. email: regis.leveugle@imag.fr organization: TIMA, Univ. Grenoble Alpes, Grenoble, France – sequence: 3 givenname: L. surname: Bossuet fullname: Bossuet, L. email: lilian.bossuet@univ-st-etienne.fr organization: Lab. Hubert Curien, Univ. of Lyon, St. Etienne, France – sequence: 4 givenname: A. surname: Aubert fullname: Aubert, A. organization: Lab. Hubert Curien, Univ. of Lyon, St. Etienne, France – sequence: 5 givenname: V. surname: Fischer fullname: Fischer, V. organization: Lab. Hubert Curien, Univ. of Lyon, St. Etienne, France – sequence: 6 givenname: B. surname: Robisson fullname: Robisson, B. email: bruno.robisson@cea.fr organization: CEA-TECH, Gardanne, France – sequence: 7 givenname: N. surname: Moro fullname: Moro, N. email: nicolas.moro@cea.fr organization: CEA-TECH, Gardanne, France – sequence: 8 givenname: P. surname: Maurine fullname: Maurine, P. email: philippe.maurine@cea.fr organization: CEA-TECH, Gardanne, France – sequence: 9 givenname: J.-M surname: Dutertre fullname: Dutertre, J.-M email: dutertre@emse.fr organization: Ecole Nat. Super. des Mines de St.-Etienne (ENSM.SE), Gardanne, France – sequence: 10 givenname: M. surname: Lisart fullname: Lisart, M. email: mathieu.lisart@st.com organization: STMicroelectron., Rousset, France |
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Snippet | Implementation attacks are a major threat to hardware cryptographic implementations. These attacks exploit the correlation existing between the computed data... |
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SubjectTerms | Circuit faults Clocks Cryptography Electromagnetics Fault Attacks Generators Harmonic analysis Probes Secure implementations Side Channel Analysis |
Title | Electromagnetic analysis and fault injection onto secure circuits |
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