RADAR: An Efficient FPGA-based ResNet Accelerator with Data-aware Reordering of Processing Sequences

• Published in: Journal of semiconductor technology and science Vol. 25; no. 4; pp. 451 - 458
• Main Authors: Park, Juntae, Choi, Dahun, Kim, Hyun
• Format: Journal Article
• Language: English
• Published: 대한전자공학회 31.08.2025
• Subjects: 전기공학

The deployment of compact convolutional neural network (CNN) models with skip connections on edge devices through dedicated hardware accelerators is increasingly prevalent. However, optimizing the use of limited on-chip memory (OCM) across multiple CNN layers, especially those with skip connections,...