Data-Pattern-Based Predictive On-Chip Power Meter in DNN Accelerator

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems p. 1
• Main Authors: Peng, Jian, Liang, Tingyuan, Jiang, Jingbo, Zhang, Yipu, Lin, Zhe, Xie, Zhiyao, Zhang, Wei
• Format: Journal Article
• Language: English
• Published: IEEE 10.06.2024
• Subjects: Arrays; Data models; data patterns; DNN accelerator; Energy efficiency; Meters; on-chip power meter; Power modeling; power prediction; Power system management; System-on-chip; Voltage measurement
• DOI: 10.1109/TCAD.2024.3412978
• ISSN: 0278-0070

Advanced power management techniques, such as voltage drop mitigation and fast power management, can greatly enhance energy efficiency in contemporary hardware design. Nevertheless, the implementation of these innovative techniques necessitates accurate and fine-grained power modeling, as well as timely responses for effective coordination with the power management unit. Additionally, existing performance-counter-based and RTL-based on-chip power meters have difficulty in providing sufficient response time for fast power and voltage management scenarios. In this paper, we propose PROPHET, a data-pattern-based power modeling method for multiply-accumulate-based (MACC) DNN accelerators. Our proposed power model extracts the pre-defined data patterns during memory access and then a pre-trained power model can predict the dynamic power of the DNN accelerators. Thus, PROPHET can predict dynamic power and provide sufficient responding time for power management units. In the experiments, we evaluate our predictive power model in four DNN accelerators with different dataflows and data types. In power model training and verification, our proposed data-patterns-based power model can realize the 2-cycle temporal resolution with R2>0.9, NMAE<7%, and the area and power overhead lower than 4.5%.