FPGA-Based Annealing Processor with Time-Division Multiplexing - IKEBE, Masayuki; MOTOMURA, Masato; ASAI, Tetsuya; YAMAMOTO, Kasho; TAKAMAEDA-YAMAZAKI, Shinya (IEICE Transactions on Information and Systems, 2019)
Keywords: Annealing; annealing processor; CMOS; Combinatorial analysis; Computer architecture; Computer simulation; Division; Embedding; Field programmable gate arrays; Graph theory; Hardware; Ising model; Microprocessors; Multiplexing; Optimization; Reproduction (copying); simulated annealing; Topology