Romano, P., & Paolone, M. (2014). Enhanced Interpolated-DFT for Synchrophasor Estimation in FPGAs: Theory, Implementation, and Validation of a PMU Prototype. IEEE transactions on instrumentation and measurement, 63(12), 2824-2836. https://doi.org/10.1109/TIM.2014.2321463
Chicago Style (17th ed.) CitationRomano, Paolo, and Mario Paolone. "Enhanced Interpolated-DFT for Synchrophasor Estimation in FPGAs: Theory, Implementation, and Validation of a PMU Prototype." IEEE Transactions on Instrumentation and Measurement 63, no. 12 (2014): 2824-2836. https://doi.org/10.1109/TIM.2014.2321463.
MLA (9th ed.) CitationRomano, Paolo, and Mario Paolone. "Enhanced Interpolated-DFT for Synchrophasor Estimation in FPGAs: Theory, Implementation, and Validation of a PMU Prototype." IEEE Transactions on Instrumentation and Measurement, vol. 63, no. 12, 2014, pp. 2824-2836, https://doi.org/10.1109/TIM.2014.2321463.