Systolic opportunities for multidimensional data streams

Portable image processing applications require an efficient, scalable platform with localized computing regions. This paper presents a new class of area I/O systolic architecture to exploit the physical data locality of planar data streams by processing data where it falls. A synthesis technique usi...

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Bibliographic Details
Published inIEEE transactions on parallel and distributed systems Vol. 13; no. 4; pp. 388 - 398
Main Authors Chai, S.M., Wills, D.S.
Format Journal Article
LanguageEnglish
Published New York IEEE 01.04.2002
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:Portable image processing applications require an efficient, scalable platform with localized computing regions. This paper presents a new class of area I/O systolic architecture to exploit the physical data locality of planar data streams by processing data where it falls. A synthesis technique using dependence graphs, data partitioning, and computation mapping is developed to handle planar data streams and to systematically design arrays with area I/O. Simulation results show that the use of area I/O provides a 16 times speedup over systems with perimeter I/O. Performance comparisons for a set of signal processing algorithms show that systolic arrays that consider planar data streams in the design process are up to three times faster than traditional arrays.
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ISSN:1045-9219
1558-2183
DOI:10.1109/71.995819