Review of error correction for PUFs and evaluation on state-of-the-art FPGAs

• Published in: Journal of cryptographic engineering Vol. 10; no. 3; pp. 229 - 247
• Main Authors: Hiller, Matthias, Kürzinger, Ludwig, Sigl, Georg
• Format: Journal Article
• Language: English
• Published: Berlin/Heidelberg Springer Berlin Heidelberg 01.09.2020; Springer Nature B.V
• Subjects: Circuits and Systems; Communications Engineering; Computer Communication Networks; Computer Science; Cryptology; Data Structures and Information Theory; Error correction; Error correction & detection; Networks; Operating Systems; Regular Paper; State-of-the-art reviews; Key generation; Hardware implementation; Physical unclonable functions; Fuzzy extractor; FPGA
• ISSN: 2190-8508; 2190-8516
• DOI: 10.1007/s13389-020-00223-w

Efficient error correction and key derivation is a prerequisite to generate secure and reliable keys from PUFs. The most common methods can be divided into linear schemes and pointer-based schemes. This work compares the performance of several previous designs on an algorithmic level concerning the required number of PUF response bits, helper data bits, number of clock cycles, and FPGA slices for two scenarios. One targets the widely used key error probability of 10 - 6 , while the other one requires a key error probability of 10 - 9 . In addition, we provide a wide span of new implementation results on state-of-the-art Xilinx FPGAs and set them in context to old synthesis results on legacy FPGAs.