Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage
Bidirectional adaptive body bias (ABB) is used to compensate for die-to-die parameter variations by applying an optimum pMOS and nMOS body bias voltage to each die which maximizes the die frequency subject to a power constraint. Measurements on a 150 nm CMOS test chip which incorporates on-chip ABB,...
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| Published in | IEEE journal of solid-state circuits Vol. 37; no. 11; pp. 1396 - 1402 |
|---|---|
| Main Authors | , , , , , , |
| Format | Journal Article |
| Language | English |
| Published |
New York
IEEE
01.11.2002
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subjects | |
| Online Access | Get full text |
| ISSN | 0018-9200 1558-173X |
| DOI | 10.1109/JSSC.2002.803949 |
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| Abstract | Bidirectional adaptive body bias (ABB) is used to compensate for die-to-die parameter variations by applying an optimum pMOS and nMOS body bias voltage to each die which maximizes the die frequency subject to a power constraint. Measurements on a 150 nm CMOS test chip which incorporates on-chip ABB, show that ABB reduces variation in die frequency by a factor of seven, while improving the die acceptance rate. An enhancement of this technique, that compensates for within-die parameter variations as well, increases the number of dies accepted in the highest frequency bin. ABB is therefore shown to provide bin split improvement in the presence of increasing process parameter variations. |
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| AbstractList | Bidirectional adaptive body bias (ABB) is used to compensate for die-to-die parameter variations by applying an optimum pMOS and nMOS body bias voltage to each die which maximizes the die frequency subject to a power constraint. Measurements on a 150 nm CMOS test chip which incorporates on-chip ABB, show that ABB reduces variation in die frequency by a factor of seven, while improving the die acceptance rate. An enhancement of this technique, that compensates for within-die parameter variations as well, increases the number of dies accepted in the highest frequency bin. ABB is therefore shown to provide bin split improvement in the presence of increasing process parameter variations. Bidirectional adaptive body bias (ae) is used to compensate for die-to-die parameter variations by applying an optimum pMOS and nMOS body bias voltage to each die which maximizes the die frequency subject to a power constraint. Measurements on a 150 nm CMOS test chip which incorporates on-chip ae, show that ae reduces variation in die frequency by a factor of seven, while improving the die acceptance rate. An enhancement of this technique, that compensates for within-die parameter variations as well, increases the number of dies accepted in the highest frequency bin. ae is therefore shown to provide bin split improvement in the presence of increasing process parameter variations. |
| Author | De, V. Nair, R. Kao, J.T. Antoniadis, D.A. Narendra, S.G. Tschanz, J.W. Chandrakasan, A.P. |
| Author_xml | – sequence: 1 givenname: J.W. surname: Tschanz fullname: Tschanz, J.W. organization: Intel Labs., Intel Corp., Hillsboro, OR, USA – sequence: 2 givenname: J.T. surname: Kao fullname: Kao, J.T. – sequence: 3 givenname: S.G. surname: Narendra fullname: Narendra, S.G. – sequence: 4 givenname: R. surname: Nair fullname: Nair, R. – sequence: 5 givenname: D.A. surname: Antoniadis fullname: Antoniadis, D.A. – sequence: 6 givenname: A.P. surname: Chandrakasan fullname: Chandrakasan, A.P. – sequence: 7 givenname: V. surname: De fullname: De, V. |
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| Snippet | Bidirectional adaptive body bias (ABB) is used to compensate for die-to-die parameter variations by applying an optimum pMOS and nMOS body bias voltage to each... Bidirectional adaptive body bias (ae) is used to compensate for die-to-die parameter variations by applying an optimum pMOS and nMOS body bias voltage to each... |
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| SubjectTerms | Acceptance tests Bias Circuits Clocks CMOS CMOS digital integrated circuits Costs Electric potential Energy consumption Frequency measurement Microprocessors MOS devices Optimization Process design Testing Voltage |
| Title | Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage |
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