Efficient Breadth-First Search on the Cell/BE Processor

Multi-core processors are a shift of paradigm in computer architecture that promises a dramatic increase in performance. But they also bring an unprecedented level of complexity in algorithmic design and software development. In this paper we describe the challenges involved in designing a breadth-f...

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Published inIEEE transactions on parallel and distributed systems Vol. 19; no. 10; pp. 1381 - 1395
Main Authors Scarpazza, D.P., Villa, O., Petrini, F.
Format Journal Article
LanguageEnglish
Published New York IEEE 01.10.2008
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Algorithm design and analysis
Algorithms
Architecture
Communication/Networking and Information Technology
Computer architecture
Computer Society
Design engineering
Emerging technologies
Energy consumption
Engines
Frequency
Mathematical models
Microprocessors
Optimization
Parallel processing
Performance of Systems
Process design
Programming
Searching
Software algorithms
Software development
Studies
Communication/Networking and Information Technology
Performance of Systems
Emerging technologies
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Abstract Multi-core processors are a shift of paradigm in computer architecture that promises a dramatic increase in performance. But they also bring an unprecedented level of complexity in algorithmic design and software development. In this paper we describe the challenges involved in designing a breadth-first search (BFS) algorithm for the Cell/B.E. processor. The proposed methodology combines a high-level algorithmic design that captures the machine-independent aspects, to guarantee portability with performance to future processors, with an implementation that embeds processor-specific optimizations. Using a fine-grained global coordination strategy derived by the bulk-synchronous parallel (BSP) model, we have determined an accurate performance model that has guided the implementation and the optimization of our algorithm. Our experiments on a pre-production Cell/B.E. board running at 3.2 GHz, show almost linear speedups when using multiple synergistic processing elements, and an impressive level of performance when compared to other processors. On graphs which offer sufficient parallelism, the Cell/B.E. is typically an order of magnitude faster than conventional processors, such as the AMD Opteron and the Intel Pentium 4 and Woodcrest, and custom-designed architectures, such as the MTA-2 and BlueGene/L.
AbstractList The proposed methodology combines a high-level algorithmic design that captures the machine-independent aspects, to guarantee portability with performance to future processors, with an implementation that embeds processor-specific optimizations.
Multi-core processors are a shift of paradigm in computer architecture that promises a dramatic increase in performance. But they also bring an unprecedented level of complexity in algorithmic design and software development. In this paper [abstract truncated by publisher].
Multi-core processors are a shift of paradigm in computer architecture that promises a dramatic increase in performance. But they also bring an unprecedented level of complexity in algorithmic design and software development. In this paper we describe the challenges involved in designing a breadth-first search (BFS) algorithm for the Cell/B.E. processor. The proposed methodology combines a high-level algorithmic design that captures the machine-independent aspects, to guarantee portability with performance to future processors, with an implementation that embeds processor-specific optimizations. Using a fine-grained global coordination strategy derived by the bulk-synchronous parallel (BSP) model, we have determined an accurate performance model that has guided the implementation and the optimization of our algorithm. Our experiments on a pre-production Cell/B.E. board running at 3.2 GHz, show almost linear speedups when using multiple synergistic processing elements, and an impressive level of performance when compared to other processors. On graphs which offer sufficient parallelism, the Cell/B.E. is typically an order of magnitude faster than conventional processors, such as the AMD Opteron and the Intel Pentium 4 and Woodcrest, and custom-designed architectures, such as the MTA-2 and BlueGene/L.
Author Petrini, F.
Villa, O.
Scarpazza, D.P.
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SubjectTerms Algorithm design and analysis
Algorithms
Architecture
Communication/Networking and Information Technology
Computer architecture
Computer Society
Design engineering
Emerging technologies
Energy consumption
Engines
Frequency
Mathematical models
Microprocessors
Optimization
Parallel processing
Performance of Systems
Process design
Programming
Searching
Software algorithms
Software development
Studies
Title Efficient Breadth-First Search on the Cell/BE Processor
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