Power/Energy Minimization Techniques for Variability-Aware High-Performance 16-nm 6T-SRAM
Power and energy minimization is a critical concern for the battery life, reliability, and yield of many minimum-sized SRAMs. In this paper, we extend our previously proposed hybrid analytical-empirical model for minimizing and predicting the delay and delay variability of SRAMs, VAR-TX, to a new en...
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| Published in | IEEE access Vol. 4; pp. 594 - 613 |
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| Main Authors | , |
| Format | Journal Article |
| Language | English |
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2016
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
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| Abstract | Power and energy minimization is a critical concern for the battery life, reliability, and yield of many minimum-sized SRAMs. In this paper, we extend our previously proposed hybrid analytical-empirical model for minimizing and predicting the delay and delay variability of SRAMs, VAR-TX, to a new enhanced version, exVAR-TX, to minimize and predict the power/energy and power/energy variability of a 16-nm 6T-SRAM under the influence of the three major types of variations: Fabrication, Operation, and Implementation. Using exVAR-TX for architectural optimization [exhaustively computing and comparing the range of feasible architectures subject to interdie (die-to-die/D2D) and intradie (within-die/WID) process and operation variations (PVT), electromigration (EM), negative bias temperature instability (NBTI), and soft-errors, among others] on top of deploying the most recent state of the art effective mitigation techniques we show that energy and energy-delay-product (EDP) of 64KB 16-nm 6T-SRAM could be reduced by ~12.5X and ~33%, respectively, as compared to the existing conventional designs. |
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| AbstractList | Power and energy minimization is a critical concern for the battery life, reliability, and yield of many minimum-sized SRAMs. In this paper, we extend our previously proposed hybrid analytical-empirical model for minimizing and predicting the delay and delay variability of SRAMs, VAR-TX, to a new enhanced version, exVAR-TX, to minimize and predict the power/energy and power/energy variability of a 16-nm 6T-SRAM under the influence of the three major types of variations: Fabrication, Operation, and Implementation. Using exVAR-TX for architectural optimization [exhaustively computing and comparing the range of feasible architectures subject to interdie (die-to-die/D2D) and intradie (within-die/WID) process and operation variations (PVT), electromigration (EM), negative bias temperature instability (NBTI), and soft-errors, among others] on top of deploying the most recent state of the art effective mitigation techniques we show that energy and energy-delay-product (EDP) of 64KB 16-nm 6T-SRAM could be reduced by ~12.5X and ~33%, respectively, as compared to the existing conventional designs. |
| Author | Samandari-Rad, Jeren Hughey, Richard |
| Author_xml | – sequence: 1 givenname: Jeren surname: Samandari-Rad fullname: Samandari-Rad, Jeren email: jerensrad@soe.ucsc.edu organization: Electr. & Comput. Eng. Depts., Univ. of California at Santa Cruz, Santa Cruz, CA, USA – sequence: 2 givenname: Richard surname: Hughey fullname: Hughey, Richard organization: Comput. Eng. Dept., Univ. of California at Santa Cruz, Santa Cruz, CA, USA |
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| SubjectTerms | 16-nm 6T-SRAM aging Delay Electromigration Empirical analysis Energy Energy consumption Energy efficiency Energy management energy-delay-product IR drop leakage current Leakage currents memory errors Memory management NBTI Optimization optimum architecture power Power system reliability reliability SRAM Temperature Temperature measurement type of variations variability yield |
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| Title | Power/Energy Minimization Techniques for Variability-Aware High-Performance 16-nm 6T-SRAM |
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