A Survey on Graph Processing Accelerators: Challenges and Opportunities
Graph is a well known data structure to represent the associated relationships in a variety of applications, e.g., data science and machine learning. Despite a wealth of existing efforts on developing graph processing systems for improving the performance and/or energy efficiency on traditional arch...
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Abstract | Graph is a well known data structure to represent the associated relationships in a variety of applications, e.g., data science and machine learning. Despite a wealth of existing efforts on developing graph processing systems for improving the performance and/or energy efficiency on traditional architectures, dedicated hardware solutions, also referred to as graph processing accelerators, are essential and emerging to provide the benefits significantly beyond what those pure software solutions can offer. In this paper, we conduct a systematical survey regarding the design and implementation of graph processing accelerators. Specifically, we review the relevant techniques in three core components toward a graph processing accelerator: preprocessing, parallel graph computation, and runtime scheduling. We also examine the benchmarks and results in existing studies for evaluating a graph processing accelerator. Interestingly, we find that there is not an absolute winner for all three aspects in graph acceleration due to the diverse characteristics of graph processing and the complexity of hardware configurations. We finally present and discuss several challenges in details, and further explore the opportunities for the future research. |
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AbstractList | Graph is a well known data structure to represent the associated relationships in a variety of applications,e.g.,data science and machine learning.Despite a wealth of existing efforts on developing graph processing systems for improving the performance and/or energy efficiency on traditional architectures,dedicated hardware solutions,also referred to as graph processing accelerators,are essential and emerging to provide the benefits significantly beyond what those pure software solutions can offer.In this paper,we conduct a systematical survey regarding the design and implementation of graph processing accelerators.Specifically,we review the relevant techniques in three core components toward a graph processing accelerator:preprocessing,parallel graph computation,and runtime scheduling.We also examine the benchmarks and results in existing studies for evaluating a graph processing accelerator.Interestingly,we find that there is not an absolute winner for all three aspects in graph acceleration due to the diverse characteristics of graph processing and the complexity of hardware configurations.We finally present and discuss several challenges in details,and further explore the opportunities for the future research. Graph is a well known data structure to represent the associated relationships in a variety of applications, e.g., data science and machine learning. Despite a wealth of existing efforts on developing graph processing systems for improving the performance and/or energy efficiency on traditional architectures, dedicated hardware solutions, also referred to as graph processing accelerators, are essential and emerging to provide the benefits significantly beyond what those pure software solutions can offer. In this paper, we conduct a systematical survey regarding the design and implementation of graph processing accelerators. Specifically, we review the relevant techniques in three core components toward a graph processing accelerator: preprocessing, parallel graph computation, and runtime scheduling. We also examine the benchmarks and results in existing studies for evaluating a graph processing accelerator. Interestingly, we find that there is not an absolute winner for all three aspects in graph acceleration due to the diverse characteristics of graph processing and the complexity of hardware configurations. We finally present and discuss several challenges in details, and further explore the opportunities for the future research. Keywords graph processing accelerator, domain-specific architecture, performance, energy efficiency |
Audience | Academic |
Author | Liao, Xiao-Fei Chen, Xin-Yu Gui, Chuang-Yi He, Bingsheng Liu, Cheng Jin, Hai Zheng, Long |
AuthorAffiliation | National Engineering Research Center for Big Data Technology and System, School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China;Services Computing Technology and System Laboratory, School of Computer Science and Technology Huazhong University of Science and Technology, Wuhan 430074, China;Cluster and Grid Computing Laboratory, School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China%School of Computing, National University of Singapore, Singapore 117418, Singapore%School of Computing, National University of Singapore, Singapore 117418, Singapore;Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China |
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Author_xml | – sequence: 1 givenname: Chuang-Yi surname: Gui fullname: Gui, Chuang-Yi organization: National Engineering Research Center for Big Data Technology and System, School of Computer Science and Technology, Huazhong University of Science and Technology, Services Computing Technology and System Laboratory, School of Computer Science and Technology, Huazhong University of Science and Technology, Cluster and Grid Computing Laboratory, School of Computer Science and Technology, Huazhong University of Science and Technology – sequence: 2 givenname: Long surname: Zheng fullname: Zheng, Long email: longzh@hust.edu.cn organization: National Engineering Research Center for Big Data Technology and System, School of Computer Science and Technology, Huazhong University of Science and Technology, Services Computing Technology and System Laboratory, School of Computer Science and Technology, Huazhong University of Science and Technology, Cluster and Grid Computing Laboratory, School of Computer Science and Technology, Huazhong University of Science and Technology – sequence: 3 givenname: Bingsheng surname: He fullname: He, Bingsheng organization: School of Computing, National University of Singapore – sequence: 4 givenname: Cheng surname: Liu fullname: Liu, Cheng organization: School of Computing, National University of Singapore, Institute of Computing Technology, Chinese Academy of Sciences – sequence: 5 givenname: Xin-Yu surname: Chen fullname: Chen, Xin-Yu organization: School of Computing, National University of Singapore – sequence: 6 givenname: Xiao-Fei surname: Liao fullname: Liao, Xiao-Fei organization: National Engineering Research Center for Big Data Technology and System, School of Computer Science and Technology, Huazhong University of Science and Technology, Services Computing Technology and System Laboratory, School of Computer Science and Technology, Huazhong University of Science and Technology, Cluster and Grid Computing Laboratory, School of Computer Science and Technology, Huazhong University of Science and Technology – sequence: 7 givenname: Hai surname: Jin fullname: Jin, Hai organization: National Engineering Research Center for Big Data Technology and System, School of Computer Science and Technology, Huazhong University of Science and Technology, Services Computing Technology and System Laboratory, School of Computer Science and Technology, Huazhong University of Science and Technology, Cluster and Grid Computing Laboratory, School of Computer Science and Technology, Huazhong University of Science and Technology |
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SubjectTerms | Accelerators Artificial Intelligence Computer Science Computers Data science Data structures Data Structures and Information Theory Energy consumption Energy efficiency Field programmable gate arrays Graph representations Hardware Information Systems Applications (incl.Internet) Machine learning Personal computers R&D Research & development Software Software Engineering Survey Surveys Theory of Computation |
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