2D materials–based homogeneous transistor-memory architecture for neuromorphic hardware - Tong, Lei; Peng, Zhuiri; Lin, Runfeng; Li, Zheng; Wang, Yilun; Huang, Xinyu; Xue, Kan-Hao; Xu, Hangyu; Liu, Feng; Xia, Hui; Wang, Peng; Xu, Mingsheng; et al. (Science (American Association for the Advancement of Science), 2021)
Future artificial intelligence applications and data-intensive computations require the development of neuromorphic systems beyond traditional heterogeneous device architectures. Physical separation between a peripheral signal-processing unit and a memory-operating unit is one of the main bottlenecks of heterogeneous architectures, blocking further improvements in efficient resistance matching, energy consumption, and integration compatibility. Tong et al . present a transistor-memory architecture based on a homogeneous tungsten selenide-on-lithium niobate device array (see the Perspective by Rao and Tao). Analog peripheral signal preprocessing and nonvolatile memory were possible within the same device structure, promising diverse neuromorphic functionalities and offering potential improvements in neuromorphic systems on-chip. —YS Homogeneous integration of 2D WSe 2 (as a peripheral circuit) on LiNbO 3 (as a memory array) can improve neuromorphic architectures. In neuromorphic hardware, peripheral circuits and memories based on heterogeneous devices are generally physically separated. Thus, exploration of homogeneous devices for these components is key for improving module integration and resistance matching. Inspired by the ferroelectric proximity effect on two-dimensional (2D) materials, we present a tungsten diselenide–on–lithium niobate cascaded architecture as a basic device that functions as a nonlinear transistor, assisting the design of operational amplifiers for analog signal processing (ASP). This device also functions as a nonvolatile memory cell, achieving memory operating (MO) functionality. On the basis of this homogeneous architecture, we also investigated an ASP-MO integrated system for binary classification and the design of ternary content-addressable memory for potential use in neuromorphic hardware.