True Energy-Performance Analysis of the MTJ-Based Logic-in-Memory Architecture (1-Bit Full Adder)

• Published in: IEEE transactions on electron devices Vol. 57; no. 5; pp. 1023 - 1028
• Main Authors: Fengbo Ren, Markovic, Dejan
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.05.2010; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Adders; Applied sciences; Architecture; Architecture (computers); Circuit properties; CMOS; CMOS integrated circuits; complimentary metal-oxide-semiconductor (CMOS) digital integrated circuits; Design engineering; Design. Technologies. Operation analysis. Testing; Devices; Digital circuits; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; energy-delay tradeoff; Equivalence; Exact sciences and technology; Integrated circuits; Logic circuits; magnetic tunnel junction (MTJ) logic; Magnetic tunneling; Magnetoelectric, magnetostrictive, magnetoacoustic, magnetooptic and magnetothermal devices. Spintronics; Memory devices; Resistance; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; spin-transfer torque (STT) devices; Switches; Switching; Transistors; Tunnel junctions; Writing; Performance evaluation; magnetic tunnel junction (MTJ) logic; Arithmetic circuit; energy-delay tradeoff; spin-transfer torque (STT) devices; CMOS digital integrated circuits; Switching; Logic circuit; Magnetic tunneling junction; Complementary MOS technology; Summing circuits; Integrated circuit; complimentary metal-oxide-semiconductor (CMOS) digital integrated circuits; Delay time; Adders
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2010.2043389

The use of spin-transfer torque (STT) devices for memory design has been a subject of research since the discovery of the STT on MgO-based magnetic tunnel junctions (MTJs). Recently, MTJ-based computing architectures such as logic-in-memory have been proposed and claim superior energy-delay performance over static CMOS. In this paper, we conduct exhaustive energy-performance analysis of an STT-MTJ-based logic-in-memory (LIM-MTJ) 1-bit full adder and compare it with its corresponding CMOS counterpart. Our results show that the LIM-MTJ circuit has no advantage in energy-performance over its equivalent CMOS designs. We also show that the MTJ-based logic circuit requiring frequent MTJ switching during the operation is hardly power efficient.