Digital prototype of LLRF system for SSRF

• Published in: Chinese physics C Vol. 32; no. 9; pp. 758 - 760
• Main Author: 赵玉彬 尹成科 张同宣 付泽川 赵振堂 戴志敏 刘建飞 王芳
• Format: Journal Article
• Language: English
• Published: IOP Publishing 01.09.2008; Shanghai Institute of Applied Physics,CAS,Shanghai 201800,China; Graduate University of Chinese Academy of Sciences,Beijing 100049,China%Shanghai Institute of Applied Physics,CAS,Shanghai 201800,China
• Subjects: LLRF系统; 反馈算法; 声编程门阵列; 局部振荡器; 数字原型; LLRF controller; local oscillator; field programming gate array; feedback algorithm; clock distribution
• ISSN: 1674-1137; 0254-3052; 2058-6132
• DOI: 10.1088/1674-1137/32/9/015

This paper describes a field programming gate array （FPGA） based low level radio frequency （LLRF） prototype for the SSRF storage ring RF system： This prototype includes the local oscillator （LO）, analog front end, digital front end, RF out, clock distributing, digital signal processing and communication functions. All feedback algorithms are performed in FPGA. The long term of the test prototype with high power shows that the variations of the RF amplitude and the phase in the accelerating cavity are less than 1% and 1° respectively, and the variation of the cavity resonance frequency is controlled within 4-10 Hz.