Equidistance routing in high-speed VLSI layout design

In VLSI layout design, certain nets in a given net set are required to propagate their signals within a tolerable skew of delays. Though the delay of the signal on a wire is determined by a complex environment, it is hard to satisfy this requirement unless all the concerned nets are routed within a...

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Published inIntegration (Amsterdam) Vol. 38; no. 3; pp. 439 - 449
Main Authors Kubo, Yukiko, Miyashita, Hiroshi, Kajitani, Yoji, Tateishi, Kazuyuki
Format Journal Article Conference Proceeding
LanguageEnglish
Published Amsterdam Elsevier B.V 01.01.2005
Elsevier Science
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Abstract In VLSI layout design, certain nets in a given net set are required to propagate their signals within a tolerable skew of delays. Though the delay of the signal on a wire is determined by a complex environment, it is hard to satisfy this requirement unless all the concerned nets are routed within a certain skew of length. In this paper, we propose L-equidistance routing, which routes the concerned nets with a prescribed length L. After a basic technique of L-equidistance routing of a single 1-sink net, an algorithm is presented for the channel routing of plural multi-sink nets. The key idea is in the symmetric-slant grid interconnect scheme by which the problem is reduced to a grid routing problem. In L-equidistance routing of a channel, the total length of a n-sink net is not unique for n⩾3. An algorithm based on dynamic programming to solve this minimization problem is presented. Then, L-equidistance switch-box routing is discussed based on the L-equidistance channel routing. Algorithms are explained on the Euclidean space. But it is shown that a straightforward transformation of the routes to those on the Manhattan grid is possible keeping the property of equidistance. The proposing channel routing algorithm was implemented and applied to random data to demonstrate their ability.
AbstractList In VLSI layout design, certain nets in a given net set are required to propagate their signals within a tolerable skew of delays. Though the delay of the signal on a wire is determined by a complex environment, it is hard to satisfy this requirement unless all the concerned nets are routed within a certain skew of length. In this paper, we propose L-equidistance routing, which routes the concerned nets with a prescribed length L. After a basic technique of L-equidistance routing of a single 1-sink net, an algorithm is presented for the channel routing of plural multi-sink nets. The key idea is in the symmetric-slant grid interconnect scheme by which the problem is reduced to a grid routing problem. In L-equidistance routing of a channel, the total length of a n-sink net is not unique for n3. An algorithm based on dynamic programming to solve this minimization problem is presented. Then, L-equidistance switch-box routing is discussed based on the L-equidistance channel routing. Algorithms are explained on the Euclidean space. But it is shown that a straightforward transformation of the routes to those on the Manhattan grid is possible keeping the property of equidistance. The proposing channel routing algorithm was implemented and applied to random data to demonstrate their ability.
In VLSI layout design, certain nets in a given net set are required to propagate their signals within a tolerable skew of delays. Though the delay of the signal on a wire is determined by a complex environment, it is hard to satisfy this requirement unless all the concerned nets are routed within a certain skew of length. In this paper, we propose L-equidistance routing, which routes the concerned nets with a prescribed length L. After a basic technique of L-equidistance routing of a single 1-sink net, an algorithm is presented for the channel routing of plural multi-sink nets. The key idea is in the symmetric-slant grid interconnect scheme by which the problem is reduced to a grid routing problem. In L-equidistance routing of a channel, the total length of a n-sink net is not unique for n⩾3. An algorithm based on dynamic programming to solve this minimization problem is presented. Then, L-equidistance switch-box routing is discussed based on the L-equidistance channel routing. Algorithms are explained on the Euclidean space. But it is shown that a straightforward transformation of the routes to those on the Manhattan grid is possible keeping the property of equidistance. The proposing channel routing algorithm was implemented and applied to random data to demonstrate their ability.
Author Tateishi, Kazuyuki
Kajitani, Yoji
Miyashita, Hiroshi
Kubo, Yukiko
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Cites_doi 10.1109/43.137519
10.1109/TCAD.1985.1270117
10.1109/TCAD.1982.1269993
10.1109/43.663822
10.1109/43.238608
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Issue 3
Keywords Switch-box routing
Channel routing
Dynamic programming
Equidistance routing
Symmetric-slant grid
Minimization of total length
VLSI circuit
Circuit design
Integrated circuit design
Algorithm
Integrated circuit layout
Signal delay
Interconnection
Integrated circuit
Delay time
Selector switch
Language English
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MeetingName ACM Great Lakes Symposium on VLSI
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Elsevier Science
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Huang (10.1016/j.vlsi.2004.07.008_bib3) 1997; 16
Chao (10.1016/j.vlsi.2004.07.008_bib4) 1992
Cong (10.1016/j.vlsi.2004.07.008_bib1) 1992; 11
Kahng (10.1016/j.vlsi.2004.07.008_bib6) 1993; 12
Hu (10.1016/j.vlsi.2004.07.008_bib2) 2000
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Reed (10.1016/j.vlsi.2004.07.008_bib8) 1985; 4
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Snippet In VLSI layout design, certain nets in a given net set are required to propagate their signals within a tolerable skew of delays. Though the delay of the...
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SubjectTerms Applied sciences
Channel routing
Circuit properties
Design. Technologies. Operation analysis. Testing
Dynamic programming
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Equidistance routing
Exact sciences and technology
Integrated circuits
Minimization of total length
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Switch-box routing
Switching, multiplexing, switched capacity circuits
Symmetric-slant grid
Title Equidistance routing in high-speed VLSI layout design
URI https://dx.doi.org/10.1016/j.vlsi.2004.07.008
https://search.proquest.com/docview/29581489
Volume 38
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