The Hysteretic Ferroelectric Tunnel FET

• Published in: IEEE transactions on electron devices Vol. 57; no. 12; pp. 3518 - 3524
• Main Authors: Ionescu, A M, Lattanzio, L, Salvatore, G A, De Michielis, L, Boucart, K, Bouvet, D
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.12.2010; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Circuit properties; Devices; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Ferroelectric devices; Ferroelectric FET; Ferroelectric materials; Ferroelectricity; FETs; Gates; Hysteresis; Iron; Magnetic and optical mass memories; memory; Molecular electronics, nanoelectronics; MOSFET circuits; nanoelectronic switch; Nanoelectronics; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Stacks; Storage and reproduction of information; Studies; Switching, multiplexing, switched capacity circuits; Temperature measurement; Transistors; tunnel FET; Tunneling; Tunnels (transportation); Memory devices; memory; Depletion layer; Transistor gate; IV-VI compound; Nanoelectronics; Silicon on insulator technology; Hysteresis loop; III-VI compound; p type semiconductor; Vinylidene fluoride polymer; Selector switch; Electrical characteristic; Ultrathin films; nanoelectronic switch; Retention factor; Multiple layer; Ferroelectric FET; tunnel FET; Temperature measurement; Field effect transistor; Ferroelectric materials; Silicon oxides; Numerical simulation; Low-power electronics; Alumina; Tunneling device; Room temperature

We present the fabrication and the electrical characterization of ferroelectric tunnel FETs (Fe-TFETs). This novel family of hysteretic switches combines the low subthreshold power of band-to-band tunneling devices with the retention characteristics of Fe gate stacks, offering some interesting featu...