Performance Optimisation of Parallelized ADAS Applications in FPGA-GPU Heterogeneous Systems: A Case Study With Lane Detection

• Published in: IEEE transactions on intelligent vehicles Vol. 4; no. 4; pp. 519 - 531
• Main Authors: Wang, Xiebing, Huang, Kai, Knoll, Alois
• Format: Journal Article
• Language: English
• Published: Piscataway IEEE 01.12.2019; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Accelerators; ADAS; Advanced driver assistance systems; Commercial off-the-shelf technology; Computer languages; Explosives detection; Field programmable gate arrays; FPGA; GPU; Graphics processing units; Lane detection; OpenCL; Optimization; Parallel processing; R&D; Research & development; Run time (computers)

The explosive growth of massive data captured by various sensors on modern vehicles has impelled the deployment of Commercial Off-The-Shelf (COTS) accelerators for the research and development of Advanced Driver Assistance Systems (ADAS). Although the advent of cross-platform programming framework s...