Flexible Digital Receiver Architecture with Optimized Components
Future wireless communication systems require increased flexibility, lower power consumption, smaller size and decreasing costs for the terminals and therewith for the components. By replacing analogue by digital signal processing the degree of integration and the flexibility of a terminal with resp...
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| Published in | International journal of electronics and communications Vol. 55; no. 6; pp. 408 - 416 |
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| Main Author | |
| Format | Journal Article |
| Language | English |
| Published |
Elsevier GmbH
2001
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| Subjects | |
| Online Access | Get full text |
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| Abstract | Future wireless communication systems require increased flexibility, lower power consumption, smaller size and decreasing costs for the terminals and therewith for the components. By replacing analogue by digital signal processing the degree of integration and the flexibility of a terminal with respect to multi-mode capability can be improved.In a highly integrated implementation the most critical components are the A/D-converter and the digital filter stages due to high speed and low power requirements. In this contribution a novel concept for a flexible, digital receiver with highly optimized components will be presented. The concept is based on down-conversion of the broadband receive signal to a low intermediate frequency. The main modules of the receiver are a properly designed ΔΣ-modulator for A/D-conversion, and novel digital filtering stages. It will be demonstrated, that the use of cascaded low-order wave digital lattice filters results in a number of advantages and makes a very efficient realization in VLSI-technology feasible. |
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| AbstractList | Summary Future wireless communication systems require increased flexibility, lower power consumption, smaller size and decreasing costs for the terminals and therewith for the components. By replacing analogue by digital signal processing the degree of integration and the flexibility of aterminal with respect to multi-mode capability can be improved.In ahighly integrated implementation the most critical components are the A/D-converter and the digital filter stages due to high speed and low power requirements. In this contribution anovel concept for aflexible, digital receiver with highly optimized components will be presented. The concept is based on down-conversion of the broadband receive signal to alow intermediate frequency. The main modules of the receiver are aproperly designed DeltaSigma-modulator for A/D-conversion, and novel digital filtering stages. It will be demonstrated, that the use of cascaded low-order wave digital lattice filters results in anumber of advantages and makes avery efficient realization in VLSI-technology feasible. Future wireless communication systems require increased flexibility, lower power consumption, smaller size and decreasing costs for the terminals and therewith for the components. By replacing analogue by digital signal processing the degree of integration and the flexibility of a terminal with respect to multi-mode capability can be improved.In a highly integrated implementation the most critical components are the A/D-converter and the digital filter stages due to high speed and low power requirements. In this contribution a novel concept for a flexible, digital receiver with highly optimized components will be presented. The concept is based on down-conversion of the broadband receive signal to a low intermediate frequency. The main modules of the receiver are a properly designed ΔΣ-modulator for A/D-conversion, and novel digital filtering stages. It will be demonstrated, that the use of cascaded low-order wave digital lattice filters results in a number of advantages and makes a very efficient realization in VLSI-technology feasible. |
| Author | Brückmann, Dieter |
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| CitedBy_id | crossref_primary_10_1109_TCSI_2007_902513 |
| Cites_doi | 10.1109/35.783134 10.1109/PROC.1986.13458 10.1109/82.775386 10.1109/35.747258 10.1109/19.414503 10.1109/35.783133 10.1109/35.747256 10.1109/82.769781 10.1109/TCS.1985.1085595 10.1109/82.718590 10.1109/4.482196 10.1109/101.537352 |
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| Copyright | 2001 Urban & Fischer Verlag |
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| Keywords | Digital receiver Wave digital filters Software radio ΔΣ-modulator |
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| References | Gazsi (bib8) 1985; 32 Efstathiou, Fridman, Zvonar (bib12) 1999; 37 D. Brückmann: Optimised Components for Flexible Digital Receivers with IF-Sampling. Proceedings 1st Karlsruher Workshop on Software Radios, Karlsruhe, Germany, 2000. 1–6. D. Brückmann, B. Ahmat, A. Neubauer: Entwurf und Optimierung von Komponenten für digitale Mobilfunkempfänger. Proceedings EIS-Workshop, Darmstadt, Germany, 1999. 37–44. Dick, Harris (bib3) 1999; 37 Fettweis (bib7) 1986; 74 Crols, Steyaert (bib14) 1995; 30 Brückmann (bib10) 2001 Cummings, Haruyama (bib2) 1999; 37 Northworthy, Schreier, Temes (bib5) 1997 Kale, Morling, Krukowski, Tsang (bib6) 1995; 44 Marquis, Peluso, Steyaert, Sansen (bib15) 1998; 45 Kaakinen, Saramäki (bib9) 1999; 46 Walden (bib11) 1999; 37 Razavi (bib13) 1996 Johansson, Wanhammer (bib16) 1999; 46 10.1078/1434-8411-54100061_bib1 10.1078/1434-8411-54100061_bib4 Kale (10.1078/1434-8411-54100061_bib6) 1995; 44 Crols (10.1078/1434-8411-54100061_bib14) 1995; 30 Northworthy (10.1078/1434-8411-54100061_bib5) 1997 Razavi (10.1078/1434-8411-54100061_bib13) 1996 Cummings (10.1078/1434-8411-54100061_bib2) 1999; 37 Brückmann (10.1078/1434-8411-54100061_bib10) 2001 Fettweis (10.1078/1434-8411-54100061_bib7) 1986; 74 Gazsi (10.1078/1434-8411-54100061_bib8) 1985; 32 Walden (10.1078/1434-8411-54100061_bib11) 1999; 37 Johansson (10.1078/1434-8411-54100061_bib16) 1999; 46 Marquis (10.1078/1434-8411-54100061_bib15) 1998; 45 Dick (10.1078/1434-8411-54100061_bib3) 1999; 37 Kaakinen (10.1078/1434-8411-54100061_bib9) 1999; 46 Efstathiou (10.1078/1434-8411-54100061_bib12) 1999; 37 |
| References_xml | – volume: 37 start-page: 96 year: 1999 end-page: 101 ident: bib11 article-title: Performance trends for Analog-to-Digital Converters publication-title: IEEE Communication Magazine contributor: fullname: Walden – volume: 45 start-page: 1232 year: 1998 end-page: 1241 ident: bib15 article-title: Optimal Parameters for Delta-Sigma-Modulator Topologies publication-title: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing contributor: fullname: Sansen – volume: 74 start-page: 270 year: 1986 end-page: 327 ident: bib7 article-title: Wave Digital Filters: Theory and Practice publication-title: Proceedings of the IEEE contributor: fullname: Fettweis – volume: 30 start-page: 1483 year: 1995 end-page: 1492 ident: bib14 article-title: A single-chip 900 MHz CMOS Receiver front-end with a high performance low-IF topology publication-title: IEEE Journal of Solid-State Circuits contributor: fullname: Steyaert – volume: 37 start-page: 112 year: 1999 end-page: 117 ident: bib3 article-title: Configurable Logic for Digital Communications: Some Signal Processing Perspectives publication-title: IEEE Communication Magazine contributor: fullname: Harris – volume: 44 start-page: 933 year: 1995 end-page: 939 ident: bib6 article-title: A High-Fidelity Decimator Chip for the Measurement of Sigma-Delta Modulator Performance publication-title: IEEE Transactions on Instrumentation and Measurement contributor: fullname: Tsang – year: 2001 ident: bib10 publication-title: Optimised decimation stages with lattice wave digital filters for a flexible digital receivers architecture contributor: fullname: Brückmann – volume: 37 start-page: 112 year: 1999 end-page: 117 ident: bib12 article-title: Recent developments in enabling technologies for software defined radio publication-title: IEEE Communication Magazine contributor: fullname: Zvonar – year: 1997 ident: bib5 publication-title: Delta-Sigma Data Converters, Theory Design and Simulation contributor: fullname: Temes – volume: 37 start-page: 108 year: 1999 end-page: 112 ident: bib2 article-title: FPGA in the Software Radio publication-title: IEEE Communication Magazine contributor: fullname: Haruyama – volume: 46 start-page: 726 year: 1999 end-page: 741 ident: bib16 article-title: Wave digital filter structures for high-speed narrow-band and wide-band filtering. IEEE Trans publication-title: Circuits Systems – II: Analog and Digital Signal Processing contributor: fullname: Wanhammer – start-page: 12 year: 1996 end-page: 25 ident: bib13 article-title: Challenges in Portable RF-Transceiver Design publication-title: IEEE Journal of Circuits and Devices contributor: fullname: Razavi – volume: 32 start-page: 68 year: 1985 end-page: 88 ident: bib8 article-title: Explicit formulas for lattice wave digital filters. IEEE Trans publication-title: Circuits Systems contributor: fullname: Gazsi – volume: 46 start-page: 906 year: 1999 end-page: 914 ident: bib9 article-title: Design of very low-sensitivity and low-noise recursive filters using a cascade of low-order lattice wave digital filters. IEEE Trans publication-title: Circuits Systems – II: Analog and Digital Signal Processing contributor: fullname: Saramäki – year: 2001 ident: 10.1078/1434-8411-54100061_bib10 contributor: fullname: Brückmann – volume: 37 start-page: 112 year: 1999 ident: 10.1078/1434-8411-54100061_bib12 article-title: Recent developments in enabling technologies for software defined radio publication-title: IEEE Communication Magazine doi: 10.1109/35.783134 contributor: fullname: Efstathiou – volume: 74 start-page: 270 year: 1986 ident: 10.1078/1434-8411-54100061_bib7 article-title: Wave Digital Filters: Theory and Practice publication-title: Proceedings of the IEEE doi: 10.1109/PROC.1986.13458 contributor: fullname: Fettweis – ident: 10.1078/1434-8411-54100061_bib4 – volume: 46 start-page: 906 year: 1999 ident: 10.1078/1434-8411-54100061_bib9 article-title: Design of very low-sensitivity and low-noise recursive filters using a cascade of low-order lattice wave digital filters. IEEE Trans publication-title: Circuits Systems – II: Analog and Digital Signal Processing doi: 10.1109/82.775386 contributor: fullname: Kaakinen – volume: 37 start-page: 108 year: 1999 ident: 10.1078/1434-8411-54100061_bib2 article-title: FPGA in the Software Radio publication-title: IEEE Communication Magazine doi: 10.1109/35.747258 contributor: fullname: Cummings – volume: 44 start-page: 933 year: 1995 ident: 10.1078/1434-8411-54100061_bib6 article-title: A High-Fidelity Decimator Chip for the Measurement of Sigma-Delta Modulator Performance publication-title: IEEE Transactions on Instrumentation and Measurement doi: 10.1109/19.414503 contributor: fullname: Kale – volume: 37 start-page: 112 year: 1999 ident: 10.1078/1434-8411-54100061_bib3 article-title: Configurable Logic for Digital Communications: Some Signal Processing Perspectives publication-title: IEEE Communication Magazine doi: 10.1109/35.783133 contributor: fullname: Dick – year: 1997 ident: 10.1078/1434-8411-54100061_bib5 contributor: fullname: Northworthy – volume: 37 start-page: 96 year: 1999 ident: 10.1078/1434-8411-54100061_bib11 article-title: Performance trends for Analog-to-Digital Converters publication-title: IEEE Communication Magazine doi: 10.1109/35.747256 contributor: fullname: Walden – volume: 46 start-page: 726 year: 1999 ident: 10.1078/1434-8411-54100061_bib16 article-title: Wave digital filter structures for high-speed narrow-band and wide-band filtering. IEEE Trans publication-title: Circuits Systems – II: Analog and Digital Signal Processing doi: 10.1109/82.769781 contributor: fullname: Johansson – ident: 10.1078/1434-8411-54100061_bib1 – volume: 32 start-page: 68 year: 1985 ident: 10.1078/1434-8411-54100061_bib8 article-title: Explicit formulas for lattice wave digital filters. IEEE Trans publication-title: Circuits Systems doi: 10.1109/TCS.1985.1085595 contributor: fullname: Gazsi – volume: 45 start-page: 1232 year: 1998 ident: 10.1078/1434-8411-54100061_bib15 article-title: Optimal Parameters for Delta-Sigma-Modulator Topologies publication-title: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing doi: 10.1109/82.718590 contributor: fullname: Marquis – volume: 30 start-page: 1483 year: 1995 ident: 10.1078/1434-8411-54100061_bib14 article-title: A single-chip 900 MHz CMOS Receiver front-end with a high performance low-IF topology publication-title: IEEE Journal of Solid-State Circuits doi: 10.1109/4.482196 contributor: fullname: Crols – start-page: 12 year: 1996 ident: 10.1078/1434-8411-54100061_bib13 article-title: Challenges in Portable RF-Transceiver Design publication-title: IEEE Journal of Circuits and Devices doi: 10.1109/101.537352 contributor: fullname: Razavi |
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| Snippet | Future wireless communication systems require increased flexibility, lower power consumption, smaller size and decreasing costs for the terminals and therewith... Summary Future wireless communication systems require increased flexibility, lower power consumption, smaller size and decreasing costs for the terminals and... |
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| SubjectTerms | Digital receiver Software radio Wave digital filters ΔΣ-modulator |
| Title | Flexible Digital Receiver Architecture with Optimized Components |
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