Design and Implementation of a Reconfigurable Corrective Control System Subject to Permanent Faults in the Controller
This article presents a reconfiguration strategy for the corrective controller achieving model matching control of an input/state asynchronous sequential machine (ASM). The considered controller is vulnerable to permanent faults that degenerate a subset of the controller's states. If the contro...
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| Published in | IEEE transactions on cybernetics Vol. 54; no. 8; pp. 4362 - 4374 |
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| Main Authors | , |
| Format | Journal Article |
| Language | English |
| Published |
United States
IEEE
01.08.2024
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| Subjects | |
| Online Access | Get full text |
| ISSN | 2168-2267 2168-2275 2168-2275 |
| DOI | 10.1109/TCYB.2023.3310004 |
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| Abstract | This article presents a reconfiguration strategy for the corrective controller achieving model matching control of an input/state asynchronous sequential machine (ASM). The considered controller is vulnerable to permanent faults that degenerate a subset of the controller's states. If the controller has a certain amount of redundancy in terms of its states, one can build a reconfiguration scheme in which the functionality of degenerated states is taken over by supplementary states. The proposed reconfiguration scheme is superior to conventional methods of fault tolerance with hardware redundancy since the required number of redundant states is much smaller. Hardware experiments on field-programmable gate array (FPGA) circuits are provided to validate the applicability of the proposed scheme. The present study serves as the first research report on the reconfigurable corrective controller. |
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| AbstractList | This article presents a reconfiguration strategy for the corrective controller achieving model matching control of an input/state asynchronous sequential machine (ASM). The considered controller is vulnerable to permanent faults that degenerate a subset of the controller's states. If the controller has a certain amount of redundancy in terms of its states, one can build a reconfiguration scheme in which the functionality of degenerated states is taken over by supplementary states. The proposed reconfiguration scheme is superior to conventional methods of fault tolerance with hardware redundancy since the required number of redundant states is much smaller. Hardware experiments on field-programmable gate array (FPGA) circuits are provided to validate the applicability of the proposed scheme. The present study serves as the first research report on the reconfigurable corrective controller.This article presents a reconfiguration strategy for the corrective controller achieving model matching control of an input/state asynchronous sequential machine (ASM). The considered controller is vulnerable to permanent faults that degenerate a subset of the controller's states. If the controller has a certain amount of redundancy in terms of its states, one can build a reconfiguration scheme in which the functionality of degenerated states is taken over by supplementary states. The proposed reconfiguration scheme is superior to conventional methods of fault tolerance with hardware redundancy since the required number of redundant states is much smaller. Hardware experiments on field-programmable gate array (FPGA) circuits are provided to validate the applicability of the proposed scheme. The present study serves as the first research report on the reconfigurable corrective controller. This article presents a reconfiguration strategy for the corrective controller achieving model matching control of an input/state asynchronous sequential machine (ASM). The considered controller is vulnerable to permanent faults that degenerate a subset of the controller's states. If the controller has a certain amount of redundancy in terms of its states, one can build a reconfiguration scheme in which the functionality of degenerated states is taken over by supplementary states. The proposed reconfiguration scheme is superior to conventional methods of fault tolerance with hardware redundancy since the required number of redundant states is much smaller. Hardware experiments on field-programmable gate array (FPGA) circuits are provided to validate the applicability of the proposed scheme. The present study serves as the first research report on the reconfigurable corrective controller. |
| Author | Kwak, Seong Woo Yang, Jung-Min |
| Author_xml | – sequence: 1 givenname: Jung-Min orcidid: 0000-0003-1743-1061 surname: Yang fullname: Yang, Jung-Min email: jmyang@ee.knu.ac.kr organization: School of Electronics Engineering, Kyungpook National University, Daegu, Republic of Korea – sequence: 2 givenname: Seong Woo orcidid: 0000-0001-6597-9115 surname: Kwak fullname: Kwak, Seong Woo email: ksw@pknu.ac.kr organization: Department of Control and Instrumentation Engineering, Pukyong National University, Busan, Republic of Korea |
| BackLink | https://www.ncbi.nlm.nih.gov/pubmed/37801382$$D View this record in MEDLINE/PubMed |
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| SubjectTerms | Actuators Asynchronous sequential machines (ASMs) Circuit faults Control systems controller reconfiguration corrective control Field programmable gate arrays field-programmable gate array (FPGA) Hardware permanent fault Transient analysis |
| Title | Design and Implementation of a Reconfigurable Corrective Control System Subject to Permanent Faults in the Controller |
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