Hierarchical and High-Girth QC LDPC Codes

• Published in: IEEE transactions on information theory Vol. 59; no. 7; pp. 4553 - 4583
• Main Authors: Yige Wang, Draper, S. C., Yedidia, J. S.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.07.2013; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Algorithms; Applied sciences; Charge carrier processes; Codes; Coding theory; Coding, codes; Decoding; Educational institutions; Error correction codes; Exact sciences and technology; Information theory; Information, signal and communications theory; Low density parity check codes; low-density parity-check (LDPC) codes; Parity check codes; Polynomials; protograph; quasi-cyclic codes; Signal and communications theory; Signal to noise ratio; Telecommunications and information theory; Cyclic code; High density; Mapping; Algorithm; quasi-cyclic codes; Implementation; Hierarchized structure; low-density parity-check (LDPC) codes; Parity check codes; Error correcting code; Error correction codes; protograph; Parity check

We present an approach to designing capacity-approaching high-girth low-density parity-check (LDPC) codes that are friendly to hardware implementation, and compatible with some desired input code structure defined using a protograph. The approach is based on a mapping of any class of codes defined u...