Novel ternary adders and subtractors in quantum cellular automata

In the modern era, advances in CMOS technology have increased the number of transistors and the complexity of computations that can be performed on each chip. Due to the many limitations of this technology, to reduce the size of the chips to the nanotechnology level and to continue Moore’s law, the...

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Published inThe Journal of supercomputing Vol. 78; no. 17; pp. 18454 - 18496
Main Authors Ghadamgahi, Seyed Mahdi, Sabbaghi-Nadooshan, Reza, Navi, Keivan
Format Journal Article
LanguageEnglish
Published New York Springer US 01.11.2022
Springer Nature B.V
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ISSN0920-8542
1573-0484
DOI10.1007/s11227-022-04593-2

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Abstract In the modern era, advances in CMOS technology have increased the number of transistors and the complexity of computations that can be performed on each chip. Due to the many limitations of this technology, to reduce the size of the chips to the nanotechnology level and to continue Moore’s law, the unique properties of quantum cellular automata have made it a candidate for future integrated circuits. Operational units such as logic and arithmetic units are the main components of processors, among which the operation of addition and subtraction is the most widely used arithmetic operator, and the design of redundant ternary adder without publishing the carry affects the performance of processors. The main aim of this paper is to design a redundant full adder and full subtractor by employing a carry and borrow bit generator module based on ternary QCA (TQCA) innovation. Based on this, the block diagram structure of the ternary redundant adder/subtractor-based TQCA circuit is presented, which includes a proposed new carry/borrow generator gate based on TQCA. The proposed full adder design has 423 ternary cells, area 0.09 µm 2 and cost 647.19, and the full subtractor has 431 ternary cells, area 0.09 µm 2 and cost 710.7. For validation, the circuits were simulated with the TQCAsim software. The results of this innovation show that the proposed architecture has significant advantages.
AbstractList In the modern era, advances in CMOS technology have increased the number of transistors and the complexity of computations that can be performed on each chip. Due to the many limitations of this technology, to reduce the size of the chips to the nanotechnology level and to continue Moore’s law, the unique properties of quantum cellular automata have made it a candidate for future integrated circuits. Operational units such as logic and arithmetic units are the main components of processors, among which the operation of addition and subtraction is the most widely used arithmetic operator, and the design of redundant ternary adder without publishing the carry affects the performance of processors. The main aim of this paper is to design a redundant full adder and full subtractor by employing a carry and borrow bit generator module based on ternary QCA (TQCA) innovation. Based on this, the block diagram structure of the ternary redundant adder/subtractor-based TQCA circuit is presented, which includes a proposed new carry/borrow generator gate based on TQCA. The proposed full adder design has 423 ternary cells, area 0.09 µm 2 and cost 647.19, and the full subtractor has 431 ternary cells, area 0.09 µm 2 and cost 710.7. For validation, the circuits were simulated with the TQCAsim software. The results of this innovation show that the proposed architecture has significant advantages.
In the modern era, advances in CMOS technology have increased the number of transistors and the complexity of computations that can be performed on each chip. Due to the many limitations of this technology, to reduce the size of the chips to the nanotechnology level and to continue Moore’s law, the unique properties of quantum cellular automata have made it a candidate for future integrated circuits. Operational units such as logic and arithmetic units are the main components of processors, among which the operation of addition and subtraction is the most widely used arithmetic operator, and the design of redundant ternary adder without publishing the carry affects the performance of processors. The main aim of this paper is to design a redundant full adder and full subtractor by employing a carry and borrow bit generator module based on ternary QCA (TQCA) innovation. Based on this, the block diagram structure of the ternary redundant adder/subtractor-based TQCA circuit is presented, which includes a proposed new carry/borrow generator gate based on TQCA. The proposed full adder design has 423 ternary cells, area 0.09 µm2 and cost 647.19, and the full subtractor has 431 ternary cells, area 0.09 µm2 and cost 710.7. For validation, the circuits were simulated with the TQCAsim software. The results of this innovation show that the proposed architecture has significant advantages.
Author Ghadamgahi, Seyed Mahdi
Navi, Keivan
Sabbaghi-Nadooshan, Reza
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  surname: Sabbaghi-Nadooshan
  fullname: Sabbaghi-Nadooshan, Reza
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  givenname: Keivan
  surname: Navi
  fullname: Navi, Keivan
  organization: Department of Electrical Engineering and Computer Science, University of California
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CitedBy_id crossref_primary_10_1016_j_nancom_2024_100528
crossref_primary_10_1109_ACCESS_2023_3274118
crossref_primary_10_1007_s10470_023_02228_x
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Keywords Index terms—quantum cellular automata (QCA)
Ternary QCA (TQCA)
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Snippet In the modern era, advances in CMOS technology have increased the number of transistors and the complexity of computations that can be performed on each chip....
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SubjectTerms Adding circuits
Arithmetic and logic units
Block diagrams
Cellular automata
Compilers
Computer Science
Innovations
Integrated circuits
Interpreters
Processor Architectures
Processors
Programming Languages
Redundancy
Subtraction
Transistors
Title Novel ternary adders and subtractors in quantum cellular automata
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