A parallel built-in self-diagnostic method for nontraditional faults of embedded memory arrays

• Published in: IEEE transactions on instrumentation and measurement Vol. 53; no. 4; pp. 915 - 932
• Main Authors: Arora, V., Jone, W.B., Huang, D.C., Das, S.R.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.08.2004; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Built-in self-test; Computer science; Fault diagnosis; Hardware; Logic arrays; Logic testing; Random access memory; Redundancy; Routing; Wires
• ISSN: 0018-9456; 1557-9662
• DOI: 10.1109/TIM.2004.830785

In this paper, we propose a built-in self-diagnostic march-based algorithm that identifies faulty memory cells based on a recently introduced nontraditional fault model. It is developed based on the DiagRSMarch algorithm, which is a diagnostic algorithm to identify traditional faults for embedded memory arrays. A minimal set of additional operations is added to DiagRSMarch for identifying the nontraditional faults without affecting the diagnostic coverage of the traditional faults. The embedded memory arrays are accessed using a bidirectional serial interfacing architecture which minimizes the routing overhead introduced by the diagnosis hardware. Using the concepts of the bidirectional interfacing technique, parallel testing, and redundant-tolerant operations, the diagnostic process can be accomplished efficiently at-speed with minimal hardware overhead.