Newly developed process integration technologies for highly reliable 40 nm ReRAM

• Published in: Japanese Journal of Applied Physics Vol. 58; no. SB; p. SBBB06
• Main Authors: Yoneda, Shinichi, Ito, Satoru, Hayakawa, Yukio, Wei, Zhiqiang, Muraoka, Shunsaku, Yasuhara, Ryutaro, Kawashima, Koichi, Himeno, Atsushi, Mikawa, Takumi
• Format: Journal Article
• Language: English
• Published: IOP Publishing 01.04.2019

We have developed a 40 nm resistive random access memory (ReRAM) technology embedded in a foundry-standard CMOS process for low-power applications. Excellent reliability was achieved in 8 Mbit, 40 nm ReRAM: 100 k cycles and 10 year retention at 85 °C after 10 k cycles were demonstrated for resistive...