APA (7th ed.) Citation

Maroof, N., & Al-Zahrani, A. Y. (2022). A Double Bit Approximate Adder Providing a New Design Perspective for Gate-Level Design. Journal of circuits, systems, and computers, 31(4), . https://doi.org/10.1142/S0218126622500657

Chicago Style (17th ed.) Citation

Maroof, Naeem, and Ali Y. Al-Zahrani. "A Double Bit Approximate Adder Providing a New Design Perspective for Gate-Level Design." Journal of Circuits, Systems, and Computers 31, no. 4 (2022). https://doi.org/10.1142/S0218126622500657.

MLA (9th ed.) Citation

Maroof, Naeem, and Ali Y. Al-Zahrani. "A Double Bit Approximate Adder Providing a New Design Perspective for Gate-Level Design." Journal of Circuits, Systems, and Computers, vol. 31, no. 4, 2022, https://doi.org/10.1142/S0218126622500657.