New Memristor-Based Crossbar Array Architecture with 50-% Area Reduction and 48-% Power Saving for Matrix-Vector Multiplication of Analog Neuromorphic Computing

• Published in: Journal of semiconductor technology and science Vol. 14; no. 3; pp. 356 - 363
• Main Authors: Truong, Son Ngoc, Min, Kyeong-Sik
• Format: Journal Article
• Language: English
• Published: 대한전자공학회 01.06.2014
• Subjects: 전기공학; Memory array circuit; artificial neural network; character recognition; synaptic weight; memristor
• DOI: 10.5573/JSTS.2014.14.3.356
• ISSN: 1598-1657

In this paper, we propose a new memristor-based crossbar array architecture, where a single memristor array and constant-term circuit are used to represent both plus-polarity and minus-polarity matrices. This is different from the previous crossbar array architecture which has two memristor arrays to represent plus-polarity and minus-polarity connection matrices, respectively. The proposed crossbar architecture is tested and verified to have the same performance with the previous crossbar architecture for applications of character recognition. For areal density, however, the proposed crossbar architecture is twice better than the previous architecture, because only single memristor array is used instead of two crossbar arrays. Moreover, the power consumption of the proposed architecture can be smaller by 48% than the previous one because the number of memristors in the proposed crossbar architecture is reduced to half compared to the previous crossbar architecture. From the high areal density and high energy efficiency, we can know that this newly proposed crossbar array architecture is very suitable to various applications of analog neuromorphic computing that demand high areal density and low energy consumption. KCI Citation Count: 43