FBDTester 2.0: Automated test sequence generation for FBD programs with internal memory states - Song, Jiyoung; Jee, Eunkyoung; Bae, Doo-Hwan (Science of computer programming, 2018)
As Function Block Diagram (FBD) programs are used to implement safety-critical systems such as nuclear reactor protection systems, it is crucial to generate effective test cases. FBD programs are running on programmable logic controllers (PLCs) that execute the programs repeatedly within a particular scan time. Among the elements of FBD programs, function blocks and feedback variables save the inputs or outputs of the previous scan cycle into internal memories. The data stored in the internal memory are used to operate the function blocks of the next scan cycle. Researchers have recently developed an automated test generation technique aiming to satisfy several structural test coverage criteria for FBD programs. Among them, Jee et al.'s approach has an advantage of generating tests from FBD programs without requiring any intermediate models. However, test sequence generation for FBD programs with internal memory states was not fully automated in Jee et al.'s approach. This paper extends Jee et al.'s work by generating test sequences from FBD programs with internal memory states in a fully automated manner. The key technique involves explicitly unwinding FBD programs and solving the test requirements using an SMT solver. We conduct experiments on increasing the coverage of test requirements by unwinding cycles and evaluating the effectiveness of the test set using mutation analysis with several subject programs, including a real-world reactor protection system. The experimental results show that the proposed approach is able to generate effective test sequences for FBD programs. To demonstrate the efficiency of the proposed approach, we compared the test sequence generation time required for our approach with those for other approaches. The comparison results show that even excluding the generation time of test models of other approaches, the proposed approach increased the time-efficiency by more than 11 times. •Developing algorithms to generate test sets for Function Block Diagram programs.•Defining Function Block Conditions for all the standard function blocks.•Implementing an automated test sequence generation tool using Yices SMT solver.•Demonstrating improved fault-detection effectiveness and time efficiency.