Optimization of on-State and Switching Performances for 15-20-kV 4H-SiC IGBTs

The 4H-SiC p-channel IGBTs designed to block 15 and 20 kV are optimized for minimum loss (on-state plus switching power) by adjusting the parameters of the JFET region, drift layer, and buffer layer, using 2-D MEDICI simulations. Switching loss exhibits a strong dependence on buffer layer thickness,...

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Bibliographic Details
Published inIEEE transactions on electron devices Vol. 55; no. 8; pp. 1920 - 1927
Main Authors Tamaki, T., Walden, G.G., Yang Sui, Cooper, J.A.
Format Journal Article
LanguageEnglish
Published New York IEEE 01.08.2008
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
4H-SiC
Device optimization
IGBT
switching frequency
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Summary:The 4H-SiC p-channel IGBTs designed to block 15 and 20 kV are optimized for minimum loss (on-state plus switching power) by adjusting the parameters of the JFET region, drift layer, and buffer layer, using 2-D MEDICI simulations. Switching loss exhibits a strong dependence on buffer layer thickness, doping, and lifetime due to their influence on the current tail. In contrast, drift layer lifetime has little effect on the crossover frequency at which the MOSFET and IGBT have equal loss.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2008.926965