Development and Validation of an EEG-Based Real-Time Emotion Recognition System Using Edge AI Computing Platform With Convolutional Neural Network System-on-Chip Design

This study proposed an electroencephalogram (EEG)-based real-time emotion recognition hardware system architecture based on multiphase convolutional neural network (CNN) algorithm implemented on a 28-nm technology chip and on field programmable gate array (FPGA) for binary and quaternary classificat...

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Published inIEEE journal on emerging and selected topics in circuits and systems Vol. 9; no. 4; pp. 645 - 657
Main Authors Fang, Wai-Chi, Wang, Kai-Yen, Fahier, Nicolas, Ho, Yun-Lung, Huang, Yu-De
Format Journal Article
LanguageEnglish
Published Piscataway IEEE 01.12.2019
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Abstract This study proposed an electroencephalogram (EEG)-based real-time emotion recognition hardware system architecture based on multiphase convolutional neural network (CNN) algorithm implemented on a 28-nm technology chip and on field programmable gate array (FPGA) for binary and quaternary classification. Sample entropy, differential asymmetry, short-time Fourier transform, and a channel reconstruction method were used for emotion feature extraction. In this work, six EEG channels were selected (FP1, FP2, F3, F4, F7, and F8), and EEG images were generated from spectrogram fusions. The complete CNN architecture included training and acceleration for efficient artificial intelligence (AI) edge application, and we proposed a multiphase CNN execution method to accommodate hardware resource constraints. Datasets of 32 subjects from the DEAP database were used to validate the proposed design, exhibiting mean accuracies for valance binary classification and valance-arousal quaternary classification of 83.36% and 76.67%, respectively. The core area and total power consumption of the CNN chip were 1.83 x 1.83 mm 2 , respectively, and 76.61 mW. The chip operation was validated using ADVANTEST V93000 PS1600, and the training process and real-time classification processing time took 0.12495 ms and 0.02634 ms for each EEG image, respectively. The proposed EEG-based realtime emotion recognition system included a dry electrode EEG headset, feature extraction processor, CNN chip platform, and graphical user interface, and the execution time costed 450 ms for each emotional state recognition.
AbstractList This study proposed an electroencephalogram (EEG)-based real-time emotion recognition hardware system architecture based on multiphase convolutional neural network (CNN) algorithm implemented on a 28-nm technology chip and on field programmable gate array (FPGA) for binary and quaternary classification. Sample entropy, differential asymmetry, short-time Fourier transform, and a channel reconstruction method were used for emotion feature extraction. In this work, six EEG channels were selected (FP1, FP2, F3, F4, F7, and F8), and EEG images were generated from spectrogram fusions. The complete CNN architecture included training and acceleration for efficient artificial intelligence (AI) edge application, and we proposed a multiphase CNN execution method to accommodate hardware resource constraints. Datasets of 32 subjects from the DEAP database were used to validate the proposed design, exhibiting mean accuracies for valance binary classification and valance-arousal quaternary classification of 83.36% and 76.67%, respectively. The core area and total power consumption of the CNN chip were [Formula Omitted], respectively, and [Formula Omitted]. The chip operation was validated using ADVANTEST V93000 PS1600, and the training process and real-time classification processing time took 0.12495 ms and 0.02634 ms for each EEG image, respectively. The proposed EEG-based real-time emotion recognition system included a dry electrode EEG headset, feature extraction processor, CNN chip platform, and graphical user interface, and the execution time costed [Formula Omitted] for each emotional state recognition.
This study proposed an electroencephalogram (EEG)-based real-time emotion recognition hardware system architecture based on multiphase convolutional neural network (CNN) algorithm implemented on a 28-nm technology chip and on field programmable gate array (FPGA) for binary and quaternary classification. Sample entropy, differential asymmetry, short-time Fourier transform, and a channel reconstruction method were used for emotion feature extraction. In this work, six EEG channels were selected (FP1, FP2, F3, F4, F7, and F8), and EEG images were generated from spectrogram fusions. The complete CNN architecture included training and acceleration for efficient artificial intelligence (AI) edge application, and we proposed a multiphase CNN execution method to accommodate hardware resource constraints. Datasets of 32 subjects from the DEAP database were used to validate the proposed design, exhibiting mean accuracies for valance binary classification and valance-arousal quaternary classification of 83.36% and 76.67%, respectively. The core area and total power consumption of the CNN chip were 1.83 x 1.83 mm 2 , respectively, and 76.61 mW. The chip operation was validated using ADVANTEST V93000 PS1600, and the training process and real-time classification processing time took 0.12495 ms and 0.02634 ms for each EEG image, respectively. The proposed EEG-based realtime emotion recognition system included a dry electrode EEG headset, feature extraction processor, CNN chip platform, and graphical user interface, and the execution time costed 450 ms for each emotional state recognition.
Author Fang, Wai-Chi
Ho, Yun-Lung
Fahier, Nicolas
Huang, Yu-De
Wang, Kai-Yen
Author_xml – sequence: 1
  givenname: Wai-Chi
  surname: Fang
  fullname: Fang, Wai-Chi
  organization: Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan
– sequence: 2
  givenname: Kai-Yen
  orcidid: 0000-0003-3406-016X
  surname: Wang
  fullname: Wang, Kai-Yen
  email: zanmo8371.ee05g@g2.nctu.edu.tw
  organization: Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan
– sequence: 3
  givenname: Nicolas
  surname: Fahier
  fullname: Fahier, Nicolas
  organization: Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan
– sequence: 4
  givenname: Yun-Lung
  surname: Ho
  fullname: Ho, Yun-Lung
  organization: Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan
– sequence: 5
  givenname: Yu-De
  surname: Huang
  fullname: Huang, Yu-De
  organization: Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan
BookMark eNqFkctO5DAQRa0RSMPrC9hYmnUaO7GdeNnThAaEYMRjZhm5nUpjSOxgOyD-iM8k_RALNuNNla7uKdt199GOdRYQOqZkQimRJ5fl_Wx6N0kJlZNUcppm6Q-0l1IukiwTfOer5_lPdBTCExkPF1Qwtoc-TuEVWtd3YCNWtsZ_VWtqFY2z2DWjgstynvxWAWp8C6pN7k0HuOzc2nEL2i2tWfd37yFChx-CsUtc1kvA0ws8c10_xJXyp1Wxcb7D_0x8HHX76tphBaoWX8Pg1yW-Of-8nZQ4m8weTY9PIZilPUS7jWoDHG3rAXo4Gz9-nlzdzC9m06tEpzKPiSJNJqRUdUo1k5oCk7LQJM9AL6Qo1KJe6BzIooFa0JxxYCoVjBOgTc1Vw7MD9Gszt_fuZYAQqyc3-PGVoRoXy2nBCClGV7Zxae9C8NBUvTed8u8VJdUqlWqTSrVKpdqmMlLyG6VNXO86emXa_7DHG9YAwNdtRSGJECz7BFpdnzM
CODEN IJESLY
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Cites_doi 10.1109/TAFFC.2017.2702749
10.1109/BIBM.2018.8621185
10.1109/TCSVT.2016.2592330
10.1109/ACCESS.2019.2914872
10.1109/ACCESS.2019.2928691
10.1016/j.ijpsycho.2009.08.006
10.1109/ACCESS.2019.2908285
10.1109/TAFFC.2017.2714671
10.1109/TMM.2016.2598092
10.1109/ACCESS.2019.2926381
10.1109/TCYB.2017.2788081
10.1109/SPAC.2017.8304360
10.1109/APCCAS.2018.8605654
10.1109/TCDS.2017.2685338
10.1109/AICAS.2019.8771581
10.1049/el.2017.3538
10.1109/ACCESS.2019.2891579
10.1109/JSEN.2018.2883497
10.1109/TBME.2010.2048568
10.1109/NER.2013.6695876
10.1109/TAFFC.2017.2660485
10.1109/IJCNN.2012.6252390
10.1109/T-AFFC.2011.15
10.1017/S0954579405050340
10.1109/TASLP.2017.2759338
10.1007/978-3-642-22336-5_13
10.1109/ACCESS.2019.2904400
10.1109/JCSSE.2013.6567313
10.1109/IJCNN.2018.8489715
10.1109/ACII.2017.8273655
ContentType Journal Article
Copyright Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2019
Copyright_xml – notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2019
DBID 97E
RIA
RIE
AAYXX
CITATION
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
DOI 10.1109/JETCAS.2019.2951232
DatabaseName IEEE All-Society Periodicals Package (ASPP) 2005–Present
IEEE All-Society Periodicals Package (ASPP) 1998–Present
IEEE Electronic Library (IEL)
CrossRef
Computer and Information Systems Abstracts
Electronics & Communications Abstracts
Technology Research Database
ProQuest Computer Science Collection
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts – Academic
Computer and Information Systems Abstracts Professional
DatabaseTitle CrossRef
Technology Research Database
Computer and Information Systems Abstracts – Academic
Electronics & Communications Abstracts
ProQuest Computer Science Collection
Computer and Information Systems Abstracts
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts Professional
DatabaseTitleList Technology Research Database

Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISSN 2156-3365
EndPage 657
ExternalDocumentID 10_1109_JETCAS_2019_2951232
8890664
Genre orig-research
GrantInformation_xml – fundername: Ministry of Science and Technology, Taiwan
  funderid: 10.13039/501100004663
GroupedDBID 0R~
4.4
5VS
6IK
97E
AAJGR
AARMG
AASAJ
AAWTH
ABAZT
ABQJQ
ABVLG
AENEX
AGQYO
AGSQL
AHBIQ
AKJIK
AKQYR
ALMA_UNASSIGNED_HOLDINGS
ATWAV
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
EBS
EJD
HZ~
IFIPE
IPLJI
JAVBF
M43
O9-
OCL
PQQKQ
RIA
RIE
RNS
AAYXX
CITATION
RIG
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
ID FETCH-LOGICAL-c297t-a0f3699ad21c49c1e4998c073ecb968abdbc7e0bfed61745e4a26450e1fd5af53
IEDL.DBID RIE
ISSN 2156-3357
IngestDate Mon Jun 30 06:22:46 EDT 2025
Thu Apr 24 22:59:30 EDT 2025
Tue Jul 01 00:41:35 EDT 2025
Wed Aug 27 06:30:45 EDT 2025
IsPeerReviewed true
IsScholarly true
Issue 4
Language English
License https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
https://doi.org/10.15223/policy-029
https://doi.org/10.15223/policy-037
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-c297t-a0f3699ad21c49c1e4998c073ecb968abdbc7e0bfed61745e4a26450e1fd5af53
Notes ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ORCID 0000-0003-3406-016X
PQID 2325184008
PQPubID 2040416
PageCount 13
ParticipantIDs ieee_primary_8890664
crossref_primary_10_1109_JETCAS_2019_2951232
proquest_journals_2325184008
crossref_citationtrail_10_1109_JETCAS_2019_2951232
ProviderPackageCode CITATION
AAYXX
PublicationCentury 2000
PublicationDate 2019-12-01
PublicationDateYYYYMMDD 2019-12-01
PublicationDate_xml – month: 12
  year: 2019
  text: 2019-12-01
  day: 01
PublicationDecade 2010
PublicationPlace Piscataway
PublicationPlace_xml – name: Piscataway
PublicationTitle IEEE journal on emerging and selected topics in circuits and systems
PublicationTitleAbbrev JETCAS
PublicationYear 2019
Publisher IEEE
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher_xml – name: IEEE
– name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
References ref13
ref12
ref15
ref14
ding (ref18) 2019
ref31
ref30
ref11
ref32
ref10
ref2
ref1
ref17
ref16
liu (ref26) 2011
ref24
ref23
ref25
ref20
ref22
ref21
ref28
gilan (ref19) 0
ref27
lin (ref3) 2010; 57
ref29
ref8
ref7
ref9
ref4
ref6
ref5
References_xml – ident: ref4
  doi: 10.1109/TAFFC.2017.2702749
– ident: ref22
  doi: 10.1109/BIBM.2018.8621185
– ident: ref29
  doi: 10.1109/TCSVT.2016.2592330
– ident: ref8
  doi: 10.1109/ACCESS.2019.2914872
– ident: ref13
  doi: 10.1109/ACCESS.2019.2928691
– ident: ref25
  doi: 10.1016/j.ijpsycho.2009.08.006
– year: 0
  ident: ref19
  article-title: FPGA-based implementation of a real-time object recognition system using convolutional neural network
  publication-title: IEEE Trans Circuits Syst II Express Briefs
– ident: ref15
  doi: 10.1109/ACCESS.2019.2908285
– start-page: 1
  year: 2019
  ident: ref18
  article-title: A FPGA-based accelerator of convolutional neural network for face feature extraction
  publication-title: Proc IEEE Int Conf Electron Devices Solid-State Circuits
– ident: ref9
  doi: 10.1109/TAFFC.2017.2714671
– ident: ref1
  doi: 10.1109/TMM.2016.2598092
– ident: ref17
  doi: 10.1109/ACCESS.2019.2926381
– ident: ref20
  doi: 10.1109/TCYB.2017.2788081
– ident: ref31
  doi: 10.1109/SPAC.2017.8304360
– ident: ref30
  doi: 10.1109/APCCAS.2018.8605654
– ident: ref21
  doi: 10.1109/TCDS.2017.2685338
– ident: ref32
  doi: 10.1109/AICAS.2019.8771581
– ident: ref16
  doi: 10.1049/el.2017.3538
– ident: ref6
  doi: 10.1109/ACCESS.2019.2891579
– ident: ref11
  doi: 10.1109/JSEN.2018.2883497
– volume: 57
  start-page: 1798
  year: 2010
  ident: ref3
  article-title: EEG-based emotion recognition in music listening
  publication-title: IEEE Trans Biomed Eng
  doi: 10.1109/TBME.2010.2048568
– ident: ref23
  doi: 10.1109/NER.2013.6695876
– ident: ref10
  doi: 10.1109/TAFFC.2017.2660485
– ident: ref28
  doi: 10.1109/IJCNN.2012.6252390
– ident: ref5
  doi: 10.1109/T-AFFC.2011.15
– ident: ref7
  doi: 10.1017/S0954579405050340
– ident: ref2
  doi: 10.1109/TASLP.2017.2759338
– start-page: 256
  year: 2011
  ident: ref26
  article-title: Real-time EEG-based emotion recognition and its applications
  publication-title: Transactions on Computational Science XII
  doi: 10.1007/978-3-642-22336-5_13
– ident: ref12
  doi: 10.1109/ACCESS.2019.2904400
– ident: ref27
  doi: 10.1109/JCSSE.2013.6567313
– ident: ref14
  doi: 10.1109/IJCNN.2018.8489715
– ident: ref24
  doi: 10.1109/ACII.2017.8273655
SSID ssj0000561644
Score 2.4387875
Snippet This study proposed an electroencephalogram (EEG)-based real-time emotion recognition hardware system architecture based on multiphase convolutional neural...
SourceID proquest
crossref
ieee
SourceType Aggregation Database
Enrichment Source
Index Database
Publisher
StartPage 645
SubjectTerms Acceleration
affective computing
Algorithms
Arousal
Artificial intelligence
Artificial neural networks
Classification
Computer architecture
convolutional neural network (CNN)
Convolutional neural networks
Electroencephalography
Emotion recognition
Feature extraction
Field programmable gate arrays
Fourier transforms
Graphical user interface
Hardware
Image reconstruction
Microprocessors
Multiphase
Neural networks
Object recognition
Power consumption
Real time
Real-time systems
System on chip
Training
Title Development and Validation of an EEG-Based Real-Time Emotion Recognition System Using Edge AI Computing Platform With Convolutional Neural Network System-on-Chip Design
URI https://ieeexplore.ieee.org/document/8890664
https://www.proquest.com/docview/2325184008
Volume 9
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1Lb9QwEB61PcGBV0EsFOQDx3qbOHHWPi4lpVQqQoVCb5Fjj9uKKltBlgO_iJ_J-LGr8hDiFMuyLSsz8Xwz-TwD8ELLXpReIMciRqtMxZWzkjdNIZz0BJgxxCGP3zaHp_XRmTzbgN31XRhEjOQznIZm_JfvFnYZQmV7SmmykPUmbJLjlu5qreMpAQk3sXYrGbGGV5Wc5SRDZaH3jtoP-_P3gcmlp4JAhajEL4YoVlb54ziONubgLhyvdpeoJZ-ny7Gf2u-_JW783-3fgzsZbLJ50o77sIHDA7h9IwXhNvy4wRpiZnDsIwHzVGeJLTz1sLZ9zV-SrXPshEAlD3dGWJuK_7CTFf2I2in3OYscBNa6c2TzNywVjQg9767MGAAy-3Q5XlD_8C0rPW0wZAiJj0hJzyvxxcD3Ly6v2atIMnkIpwf0eg95rt7ArdCzkZvCV43WxonS1tqWSL6VsnSioO11o0zvejvDovfoCEXVEmtD4EwWWHonjZfVI9gaFgM-BibrSlnvtK3R1qXzypuS5mnlUFW9EhMQK1F2Nqc2DxU2rrro4hS6S_Lvgvy7LP8J7K4nXafMHv8evh0kuh6ahTmBnZXOdPnr_9rRcBk850I9-fusp3ArrJ1oMTuwNX5Z4jMCN2P_PGr1T4CQ96E
linkProvider IEEE
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwzV3LbtQwFLWqsgAWvApi2gJewA5PEyfO2AsWQ5sy05dQaaG7NLGvaUWVqWgGBN_CB_AT_BvXjxmVh9hVYhXLshPLOc49vjm-l5CnSjQ8tRwYJN5bVWdMGi1YUSTcCIuEGZwfcnevGB3mW0fiaIF8m5-FAQAvPoO-K_p_-Waip85VtialQguZRwnlNnz5jBu0ixfjDXybzzjfLA_WRyzmEGCaq0HH6sRmhVK14anOlU4BGb7UiGvQjSpk3ZhGDyBpLBi05bmAvEaKIBJIrRG1dTkh8AN_DXmG4OF02NyD47h34bPFotksWJaJQQxrlCZqbQsHM3zjtGOqz5HG8Iz_Yvp8Lpc_DIC3apu3yY_ZfAQxy4f-tGv6-utvoSL_1wm7Q25FOk2HAf93yQK098jNS0EWl8j3S7ooWreGvsWtR8gkRScWa2hZvmIv0Zobuo-0mblTMbQM6Y3o_kxgheUQ3Z16lQUtzXugwzENaTFczeuzunNbAPrutDvB-vZTXNY4QBcDxV-86D7eiU1atn5yek43vIzmPjm8kql6QBbbSQsPCRV5JrU1Sueg89RYaesU-ylpQGaN5D3CZ9CpdAze7nKInFV-E5eoKuCtcnirIt565Pm803mIXfLv5ksOQfOmETw9sjrDaBW_bxcVNhfON5DI5b_3ekKujw52d6qd8d72CrnhnhNEQKtksfs4hUdI5brmsV9RlBxfNSJ_AoexVz8
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Development+and+Validation+of+an+EEG-Based+Real-Time+Emotion+Recognition+System+Using+Edge+AI+Computing+Platform+With+Convolutional+Neural+Network+System-on-Chip+Design&rft.jtitle=IEEE+journal+on+emerging+and+selected+topics+in+circuits+and+systems&rft.au=Wai-Chi%2C+Fang&rft.au=Kai-Yen%2C+Wang&rft.au=Fahier%2C+Nicolas&rft.au=Yun-Lung%2C+Ho&rft.date=2019-12-01&rft.pub=The+Institute+of+Electrical+and+Electronics+Engineers%2C+Inc.+%28IEEE%29&rft.issn=2156-3357&rft.eissn=2156-3365&rft.volume=9&rft.issue=4&rft.spage=645&rft_id=info:doi/10.1109%2FJETCAS.2019.2951232&rft.externalDBID=NO_FULL_TEXT
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=2156-3357&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=2156-3357&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=2156-3357&client=summon