HIPU: A Hybrid Intelligent Processing Unit With Fine-Grained ISA for Real-Time Deep Neural Network Inference Applications - Zhao, Wenzhe; Yang, Guoming; Xia, Tian; Chen, Fei; Zheng, Nanning; Ren, Pengju (IEEE transactions on very large scale integration (VLSI) systems, 2023)
Keywords: Accelerators; Algorithms; Artificial neural networks; Convolution; Design optimization; Inference; Inference algorithms; Matrix converters; Network-on-chip (NoC); neural network (NN) inference accelerating; Neural networks; Operators; out-of-order (OoO) superscalar processor; Performance enhancement; Real time; Real-time systems; reduced instruction set architecture; Schedules; Task analysis