High-Performance FPGA-Based CNN Accelerator With Block-Floating-Point Arithmetic - Lian, Xiaocong; Liu, Zhenyu; Song, Zhourui; Dai, Jiwu; Zhou, Wei; Ji, Xiangyang (IEEE transactions on very large scale integration (VLSI) systems, 2019)
Keywords: Accelerators; Artificial neural networks; Block floating point (BFP); Computational modeling; Computer memory; Computer vision; convolutional neural network (CNN) accelerator; Embedded systems; Feature maps; Field programmable gate arrays; field-programmable gate array (FPGA); Floating point arithmetic; Hardware; Mathematical model; Memory management; Neural networks; Quantization (signal); Retraining; Rounding; Speech processing; three-level parallel