APA (7th ed.) Citation

Lian, X., Liu, Z., Song, Z., Dai, J., Zhou, W., & Ji, X. (2019). High-Performance FPGA-Based CNN Accelerator With Block-Floating-Point Arithmetic. IEEE transactions on very large scale integration (VLSI) systems, 27(8), 1874-1885. https://doi.org/10.1109/TVLSI.2019.2913958

Chicago Style (17th ed.) Citation

Lian, Xiaocong, Zhenyu Liu, Zhourui Song, Jiwu Dai, Wei Zhou, and Xiangyang Ji. "High-Performance FPGA-Based CNN Accelerator With Block-Floating-Point Arithmetic." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27, no. 8 (2019): 1874-1885. https://doi.org/10.1109/TVLSI.2019.2913958.

MLA (9th ed.) Citation

Lian, Xiaocong, et al. "High-Performance FPGA-Based CNN Accelerator With Block-Floating-Point Arithmetic." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 8, 2019, pp. 1874-1885, https://doi.org/10.1109/TVLSI.2019.2913958.