A Power-Efficient Receiver Architecture Employing Bias-Current-Shared RF and Baseband With Merged Supply Voltage Domains and 1/f Noise Reduction
A power-efficient quadrature receiver employing a down-converter that uses a passive current-commutating mixer for frequency translation is presented. The architecture uses bias-current sharing between the RF and baseband stages while making the full supply voltage available to either stage. An inpu...
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Published in | IEEE journal of solid-state circuits Vol. 47; no. 2; pp. 381 - 391 |
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Main Authors | , |
Format | Journal Article |
Language | English |
Published |
New York, NY
IEEE
01.02.2012
Institute of Electrical and Electronics Engineers |
Subjects | |
Online Access | Get full text |
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