A Novel Conflict-Free Parallel Memory Access Scheme for FFT Processors
This brief presents a novel conflict-free access scheme for memory-based fast Fourier transform (FFT) processors. It is proved to satisfy the constraints of the mixed-radix, continuous-flow, parallel-processing, and variable-size FFT computations. An address generation unit is also designed and outp...
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Published in | IEEE transactions on circuits and systems. II, Express briefs Vol. 64; no. 11; pp. 1347 - 1351 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.11.2017
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | This brief presents a novel conflict-free access scheme for memory-based fast Fourier transform (FFT) processors. It is proved to satisfy the constraints of the mixed-radix, continuous-flow, parallel-processing, and variable-size FFT computations. An address generation unit is also designed and outperforms existing architectures with reduced gate delay and lower hardware complexity. |
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ISSN: | 1549-7747 1558-3791 |
DOI: | 10.1109/TCSII.2017.2683643 |