VLSI Architectures of Approximate Arithmetic Units Applied to Parallel Sensors Calibration

Approximate computing maximizes area and energy savings for a trade-off between quality and efficiency. Approximate arithmetic operators have emerged as an efficient alternative to design low-power VLSI circuits. This paper investigates the design of approximate arithmetic operator units used in the...

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Published inIEEE transactions on circuits and systems. I, Regular papers Vol. 71; no. 3; pp. 1 - 0
Main Authors da Rosa, Morgana Macedo Azevedo, da Costa, Patricia Ucker Leleu, da Costa, Eduardo Antonio Cesar, Soares, Rafael I., Bampi, Sergio
Format Journal Article
LanguageEnglish
Published New York IEEE 01.03.2024
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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ISSN1549-8328
1558-0806
DOI10.1109/TCSI.2023.3331675

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Abstract Approximate computing maximizes area and energy savings for a trade-off between quality and efficiency. Approximate arithmetic operators have emerged as an efficient alternative to design low-power VLSI circuits. This paper investigates the design of approximate arithmetic operator units used in the calibration procedure for radio astronomy light sensors - the so-called StEFCal (statistically efficient and fast calibration) method. The StEFCal algorithm comprises arithmetic operations like a divider, square-accumulate (SAC), and multiply-accumulate (MAC) units. The StEFCal circuit of this work explores the following arithmetic operators: i) two approximate squarer units from the literature, i.e., radix-4 (AxRSU) and SquASH, ii) two approximate iterative-based Newton-Raphson (NR) and Goldschmidt (GLD) dividers, iii) one approximate parallel prefix adder (AxPPA), and iv) a new approximate radix-4 multiplier (AxRMU), proposed in this work, explored in the StEFCal multiply-accumulate circuit design. The AxRSU utilizes the parameters <inline-formula> <tex-math notation="LaTeX">K1</tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">K2</tex-math> </inline-formula> to represent the number of exact encoders for squarer-and conventional-partial products, respectively, subsequently replaced with approximate encoders. The same principle applies to AxRMU, where the parameter <inline-formula> <tex-math notation="LaTeX">K</tex-math> </inline-formula> indicates the number of exact encoders for conventional-partial products, subsequently exchanged with approximate encoders. We demonstrate the efficiency of StEFCal using the approximate arithmetic operators from the Pareto-optimal front that expresses the area-and power-quality trade-off. The results show that using the AxRSU with <inline-formula> <tex-math notation="LaTeX">K1=4</tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">K2=6</tex-math> </inline-formula>, AxRMU, and AxPPA with <inline-formula> <tex-math notation="LaTeX">K=16</tex-math> </inline-formula> and NR with one iteration has an MSE equal to <inline-formula> <tex-math notation="LaTeX">89.98</tex-math> </inline-formula>dB and offers up to <inline-formula> <tex-math notation="LaTeX">158\times</tex-math> </inline-formula> energy-savings compared to the exact StEFCal, and up to <inline-formula> <tex-math notation="LaTeX">25\times</tex-math> </inline-formula> more energy-savings and <inline-formula> <tex-math notation="LaTeX">3.33\times</tex-math> </inline-formula> area-savings compared with our previous work, <inline-formula> <tex-math notation="LaTeX">440\times</tex-math> </inline-formula> energy-savings compared to the accurate state-of-the-art, and <inline-formula> <tex-math notation="LaTeX">258\times</tex-math> </inline-formula> compared with the approximate state-of-the-art.
AbstractList Approximate computing maximizes area and energy savings for a trade-off between quality and efficiency. Approximate arithmetic operators have emerged as an efficient alternative to design low-power VLSI circuits. This paper investigates the design of approximate arithmetic operator units used in the calibration procedure for radio astronomy light sensors - the so-called StEFCal (statistically efficient and fast calibration) method. The StEFCal algorithm comprises arithmetic operations like a divider, square-accumulate (SAC), and multiply-accumulate (MAC) units. The StEFCal circuit of this work explores the following arithmetic operators: i) two approximate squarer units from the literature, i.e., radix-4 (AxRSU) and SquASH, ii) two approximate iterative-based Newton-Raphson (NR) and Goldschmidt (GLD) dividers, iii) one approximate parallel prefix adder (AxPPA), and iv) a new approximate radix-4 multiplier (AxRMU), proposed in this work, explored in the StEFCal multiply-accumulate circuit design. The AxRSU utilizes the parameters <inline-formula> <tex-math notation="LaTeX">K1</tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">K2</tex-math> </inline-formula> to represent the number of exact encoders for squarer-and conventional-partial products, respectively, subsequently replaced with approximate encoders. The same principle applies to AxRMU, where the parameter <inline-formula> <tex-math notation="LaTeX">K</tex-math> </inline-formula> indicates the number of exact encoders for conventional-partial products, subsequently exchanged with approximate encoders. We demonstrate the efficiency of StEFCal using the approximate arithmetic operators from the Pareto-optimal front that expresses the area-and power-quality trade-off. The results show that using the AxRSU with <inline-formula> <tex-math notation="LaTeX">K1=4</tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">K2=6</tex-math> </inline-formula>, AxRMU, and AxPPA with <inline-formula> <tex-math notation="LaTeX">K=16</tex-math> </inline-formula> and NR with one iteration has an MSE equal to <inline-formula> <tex-math notation="LaTeX">89.98</tex-math> </inline-formula>dB and offers up to <inline-formula> <tex-math notation="LaTeX">158\times</tex-math> </inline-formula> energy-savings compared to the exact StEFCal, and up to <inline-formula> <tex-math notation="LaTeX">25\times</tex-math> </inline-formula> more energy-savings and <inline-formula> <tex-math notation="LaTeX">3.33\times</tex-math> </inline-formula> area-savings compared with our previous work, <inline-formula> <tex-math notation="LaTeX">440\times</tex-math> </inline-formula> energy-savings compared to the accurate state-of-the-art, and <inline-formula> <tex-math notation="LaTeX">258\times</tex-math> </inline-formula> compared with the approximate state-of-the-art.
Approximate computing maximizes area and energy savings for a trade-off between quality and efficiency. Approximate arithmetic operators have emerged as an efficient alternative to design low-power VLSI circuits. This paper investigates the design of approximate arithmetic operator units used in the calibration procedure for radio astronomy light sensors — the so-called StEFCal (statistically efficient and fast calibration) method. The StEFCal algorithm comprises arithmetic operations like a divider, square-accumulate (SAC), and multiply-accumulate (MAC) units. The StEFCal circuit of this work explores the following arithmetic operators: i) two approximate squarer units from the literature, i.e., radix-4 (AxRSU) and SquASH, ii) two approximate iterative-based Newton-Raphson (NR) and Goldschmidt (GLD) dividers, iii) one approximate parallel prefix adder (AxPPA), and iv) a new approximate radix-4 multiplier (AxRMU), proposed in this work, explored in the StEFCal multiply-accumulate circuit design. The AxRSU utilizes the parameters [Formula Omitted] and [Formula Omitted] to represent the number of exact encoders for squarer- and conventional-partial products, respectively, subsequently replaced with approximate encoders. The same principle applies to AxRMU, where the parameter [Formula Omitted] indicates the number of exact encoders for conventional-partial products, subsequently exchanged with approximate encoders. We demonstrate the efficiency of StEFCal using the approximate arithmetic operators from the Pareto-optimal front that expresses the area- and power-quality trade-off. The results show that using the AxRSU with [Formula Omitted] and [Formula Omitted], AxRMU, and AxPPA with [Formula Omitted] and NR with one iteration has an MSE equal to 89.98dB and offers up to [Formula Omitted] energy-savings compared to the exact StEFCal, and up to [Formula Omitted] more energy-savings and [Formula Omitted] area-savings compared with our previous work, [Formula Omitted] energy-savings compared to the accurate state-of-the-art, and [Formula Omitted] compared with the approximate state-of-the-art.
Author Soares, Rafael I.
da Rosa, Morgana Macedo Azevedo
da Costa, Eduardo Antonio Cesar
da Costa, Patricia Ucker Leleu
Bampi, Sergio
Author_xml – sequence: 1
  givenname: Morgana Macedo Azevedo
  orcidid: 0000-0001-9582-9011
  surname: da Rosa
  fullname: da Rosa, Morgana Macedo Azevedo
  organization: Programa de Pós-Graduação em Computação (PPGC), Universidade Federal de Pelotas (UFPel), Pelotas, Brazil
– sequence: 2
  givenname: Patricia Ucker Leleu
  orcidid: 0000-0001-5121-7101
  surname: da Costa
  fullname: da Costa, Patricia Ucker Leleu
  organization: PGMICRO, Universidade Federal do Rio Grande do Sul (UFRGS), Porto Alegre, Brazil
– sequence: 3
  givenname: Eduardo Antonio Cesar
  orcidid: 0000-0003-0521-5898
  surname: da Costa
  fullname: da Costa, Eduardo Antonio Cesar
  organization: Mestrado em Engenharia Eletrônica e Computação (MEEC), Universidade Católica de Pelotas (UCPel), Pelotas, Brazil
– sequence: 4
  givenname: Rafael I.
  orcidid: 0000-0001-9493-7272
  surname: Soares
  fullname: Soares, Rafael I.
  organization: Programa de Pós-Graduação em Computação (PPGC), Universidade Federal de Pelotas (UFPel), Pelotas, Brazil
– sequence: 5
  givenname: Sergio
  orcidid: 0000-0002-9018-6309
  surname: Bampi
  fullname: Bampi, Sergio
  organization: PGMICRO, Universidade Federal do Rio Grande do Sul (UFRGS), Porto Alegre, Brazil
BookMark eNp9UE1LAzEUDFLBtvoDBA8Bz1vzsdlNjqX4USgotPXgJaS7LzRlu6lJCvrv3bUexIOn92Bm3ryZERq0vgWErimZUErU3Wq2nE8YYXzCOadFKc7QkAohMyJJMej3XGWSM3mBRjHuCGGKcDpEb6-L5RxPQ7V1Cap0DBCxt3h6OAT_4fYmQQe6tN1DchVety7FHmwc1Dh5_GKCaRpo8BLa6EPEM9O4TTDJ-fYSnVvTRLj6mWO0frhfzZ6yxfPjfDZdZBVTecosFYrJYgOSWFmqUpRUqpoxygm1itaMkFoKzgtLaNlRRGVET2ObvGDK1nyMbk93u5ffjxCT3vljaDtLzRRnoiy4EB2LnlhV8DEGsPoQunzhU1Oi-wp1X6HuK9Q_FXaa8o-mcuk7WwrGNf8qb05KBwC_nDjL80LyLyXafyQ
CODEN ITCSCH
CitedBy_id crossref_primary_10_1109_TCSI_2024_3443270
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ContentType Journal Article
Copyright Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2024
Copyright_xml – notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2024
DBID 97E
RIA
RIE
AAYXX
CITATION
7SP
8FD
L7M
DOI 10.1109/TCSI.2023.3331675
DatabaseName IEEE All-Society Periodicals Package (ASPP) 2005–Present
IEEE All-Society Periodicals Package (ASPP) 1998–Present
IEEE Electronic Library (IEL)
CrossRef
Electronics & Communications Abstracts
Technology Research Database
Advanced Technologies Database with Aerospace
DatabaseTitle CrossRef
Technology Research Database
Advanced Technologies Database with Aerospace
Electronics & Communications Abstracts
DatabaseTitleList
Technology Research Database
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISSN 1558-0806
EndPage 0
ExternalDocumentID 10_1109_TCSI_2023_3331675
10324468
Genre orig-research
GrantInformation_xml – fundername: Coordenação de Aperfeiçoamento de Pessoal de Nível Superior–Brasil (CAPES)–Finance Code 001
GroupedDBID 0R~
29I
4.4
6IK
97E
AAJGR
AARMG
AASAJ
AAWTH
ABAZT
ABQJQ
ABVLG
ACIWK
AGQYO
AHBIQ
AKJIK
AKQYR
ALMA_UNASSIGNED_HOLDINGS
ATWAV
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
EBS
HZ~
H~9
IFIPE
IPLJI
JAVBF
M43
O9-
OCL
PZZ
RIA
RIE
RNS
5VS
AAYXX
AETIX
AGSQL
AIBXA
CITATION
EJD
RIG
VJK
7SP
8FD
L7M
ID FETCH-LOGICAL-c294t-f159286be80f879757189d221301f91d200d85336f0170f85ca579752b4629fd3
IEDL.DBID RIE
ISSN 1549-8328
IngestDate Mon Jun 30 08:38:19 EDT 2025
Thu Apr 24 22:57:33 EDT 2025
Tue Jul 01 04:15:21 EDT 2025
Wed Aug 27 02:17:10 EDT 2025
IsPeerReviewed true
IsScholarly true
Issue 3
Language English
License https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
https://doi.org/10.15223/policy-029
https://doi.org/10.15223/policy-037
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-c294t-f159286be80f879757189d221301f91d200d85336f0170f85ca579752b4629fd3
Notes ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ORCID 0000-0002-9018-6309
0000-0003-0521-5898
0000-0001-5121-7101
0000-0001-9493-7272
0000-0001-9582-9011
PQID 2932576355
PQPubID 85411
PageCount 0
ParticipantIDs crossref_primary_10_1109_TCSI_2023_3331675
ieee_primary_10324468
proquest_journals_2932576355
crossref_citationtrail_10_1109_TCSI_2023_3331675
ProviderPackageCode CITATION
AAYXX
PublicationCentury 2000
PublicationDate 2024-03-01
PublicationDateYYYYMMDD 2024-03-01
PublicationDate_xml – month: 03
  year: 2024
  text: 2024-03-01
  day: 01
PublicationDecade 2020
PublicationPlace New York
PublicationPlace_xml – name: New York
PublicationTitle IEEE transactions on circuits and systems. I, Regular papers
PublicationTitleAbbrev TCSI
PublicationYear 2024
Publisher IEEE
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher_xml – name: IEEE
– name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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SSID ssj0029031
Score 2.4463375
Snippet Approximate computing maximizes area and energy savings for a trade-off between quality and efficiency. Approximate arithmetic operators have emerged as an...
SourceID proquest
crossref
ieee
SourceType Aggregation Database
Enrichment Source
Index Database
Publisher
StartPage 1
SubjectTerms Adders
Algorithms
Approximation algorithms
Arithmetic
Arithmetic and logic units
AxPPA
AxRMU
AxRSU
Calibration
Circuit design
Coders
Dividers
Goldschmidt
Iterative methods
Mathematical analysis
Newton-Raphson
Operators
Parameters
Radio astronomy
Sensors
Signal processing algorithms
SquASH
State of the art
StEFCal
Tradeoffs
Very large scale integration
VLSI
Title VLSI Architectures of Approximate Arithmetic Units Applied to Parallel Sensors Calibration
URI https://ieeexplore.ieee.org/document/10324468
https://www.proquest.com/docview/2932576355
Volume 71
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV3PS8MwFA66kx78OXE6JQdPQrsuTbrmOIZjEx3CNhleStomOJyrrB2If73vtd2YiuKt0KSEvJe87zX5vkfIlUZZOMlCy4m82OIKNSAhUFtKcamFVq6IkZx8P_B6Y347EZOSrJ5zYbTW-eUzbeNjfpYfJ9ESf5U1UPwN0hd_m2yDnxVkrXV2JR23EEfl0gI39csjzKYjG6POsG9jnXDbdZH5Lb4Eobyqyo-tOI8v3X0yWI2suFbyYi-z0I4-vok2_nvoB2SvRJq0XbjGIdnS8yOyu6E_eEyeHu-GfdreOEtIaWJoG3XG36eAZTW8nGbPr8h0pAhPU1rCVpol9EEtsBLLjA4hF04WKUWiV1i4VJWMuzejTs8qiy1YEZM8swzgGuZ7ofYd47dkS0DQkjFjEOOaRjZjWE0xhHbXM6i4Y3wRKYHNWMg9Jk3snpDKPJnrU0Ijplsw2bAbMM2bRigpXK59GSo_ipVnasRZzX4QlUrkWBBjFuQZiSMDNFiABgtKg9XI9brLWyHD8VfjKhpgo2Ex9zVSX9k4KFdqGgDcwZwLYNfZL93OyQ58nRcXz-qkki2W-gKQSBZe5h74CcM714M
linkProvider IEEE
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV3dS8MwED_8eFAf_BbnZx58Elq7NOmaxyHKpnMImyK-lLRNUNRVtg7Ev967tpOpKL4VmrQld8n9rsnvdwBHhmThFI8dLwlSR2jSgMRA7WgtlJFG-zIlcvJVN2jdiIs7eVeR1QsujDGmOHxmXLos9vLTLBnTr7ITEn_D9CWchXl8npAlXeszv1KeX8qjCuWgo4bVJmbdUyf9017bpUrhru8T91t-CUNFXZUfi3ERYc5XoDv5tvJgyZM7zmM3ef8m2_jvj1-F5QprsmbpHGswYwbrsDSlQLgB97edXps1p3YTRiyzrElK42-PiGYN3nzMH16I68gIoI5YBVxZnrFrPaRaLM-sh9lwNhwxonrFpVNtws35Wf-05VTlFpyEK5E7FpEND4PYhJ4NG6ohMWyplHOMcnWr6inOpxSDux9Y0tyxoUy0pGY8FgFXNvW3YG6QDcw2sISbBg42rgfciLqVWklfmFDFOkxSHdgaeJPRj5JKi5xKYjxHRU7iqYgMFpHBospgNTj-7PJaCnH81XiTDDDVsBz7GuxNbBxVc3UUIeChrAuB184v3Q5hodW_6kSddvdyFxbxTaI8hrYHc_lwbPYRl-TxQeGNHziG2tA
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=VLSI+Architectures+of+Approximate+Arithmetic+Units+Applied+to+Parallel+Sensors+Calibration&rft.jtitle=IEEE+transactions+on+circuits+and+systems.+I%2C+Regular+papers&rft.au=Morgana+Macedo+Azevedo+da+Rosa&rft.au=Patricia+Ucker+Leleu+da+Costa&rft.au=Eduardo+Antonio+Cesar+da+Costa&rft.au=Soares%2C+Rafael+I&rft.date=2024-03-01&rft.pub=The+Institute+of+Electrical+and+Electronics+Engineers%2C+Inc.+%28IEEE%29&rft.issn=1549-8328&rft.eissn=1558-0806&rft.volume=71&rft.issue=3&rft.spage=1000&rft_id=info:doi/10.1109%2FTCSI.2023.3331675&rft.externalDBID=NO_FULL_TEXT
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1549-8328&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1549-8328&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1549-8328&client=summon