Layerwise Buffer Voltage Scaling for Energy-Efficient Convolutional Neural Network

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 40; no. 1; pp. 1 - 10
• Main Authors: Ha, Minho, Byun, Younghoon, Moon, Seungsik, Lee, Youngjoo, Lee, Sunggu
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.01.2021; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Approximate computing; Artificial neural networks; Bit error rate; Buffers; Computer architecture; convolutional neural network (CNN); Electric potential; Energy consumption; energy-efficient memory; Error analysis; error resilience analysis; Image classification; Interlayers; Moon; Neural networks; Random access memory; Resilience; System-on-chip; Voltage; Voltage control
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2020.2992527

In order to effectively reduce buffer energy consumption, which constitutes a significant part of the total energy consumption in a convolutional neural network (CNN), it is useful to apply different amounts of energy conservation effort to the different levels of a CNN as the buffer energy to total energy usage ratios can differ quite substantially across the layers of a CNN. This article proposes layerwise buffer voltage scaling as an effective technique for reducing buffer access energy. Error-resilience analysis, including interlayer effects, conducted during design-time is used to determine the specific buffer supply voltage to be used for each layer of a CNN. Then these layer-specific buffer supply voltages are used in the CNN for image classification inference. Error injection experiments with three different types of CNN architectures show that, with this technique, the buffer access energy and overall system energy can be reduced by up to 68.41% and 33.68%, respectively, without sacrificing image classification accuracy.