The Effects of Gate-Connected Field Plates on Hotspot Temperatures of AlGaN/GaN HEMTs

• Published in: IEEE transactions on electron devices Vol. 67; no. 1; pp. 57 - 62
• Main Authors: Dundar, Canberk, Kara, Dogacan, Donmezer, Nazli
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.01.2020; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Aluminum gallium nitride; Aluminum gallium nitrides; Electric fields; Electron mobility; Electrothermal modeling; field plates; GaN high electron mobility transistors (HEMTs); HEMTs; High electron mobility transistors; Joule heating; Logic gates; MODFETs; Optimization; Passivation; Passivity; Performance evaluation; Plates; Semiconductor devices; Silicon nitride; Temperature effects; Thickness; Thin films; Wide band gap semiconductors
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2019.2953123

To increase the reliability and the maximum performance of AlGaN/GaN high electron mobility transistors (HEMTs), gate field plates are frequently used with surface passivation. Although significant research has been done to understand the electrical effects of gate field plates on devices, their thermal effects are still not fully understood. For this purpose, electrothermal simulations are performed on devices with and without gate field plates having different thicknesses of Si3N4 surface passivation at two different biasing conditions. These simulations prove that more than 8% reduction of maximum temperature can be achieved with the use of gate field plates on devices operated at P = 4 W/mm. Field plates, when used in multifinger device configurations, have a greater impact on the outermost fingers' temperatures and can be used to achieve temperature uniformity. Surface passivation studies suggest that while thick passivation layers (~200 nm in case of Si 3 N 4 ) eliminate the thermal advantages of the field plate technology, very thin passivation layers (~45 nm) cause an increase in the electric field and a decrease in the breakdown voltage. Thus, significant thermal advantages can be achieved when gate field plates are introduced following a field plate length and passivation thickness optimization based on the device biasing conditions.