Time- and Frequency-Domain Fault Detection in a VSC-Interfaced Experimental DC Test System

• Published in: IEEE transactions on industrial informatics Vol. 14; no. 10; pp. 4353 - 4364
• Main Authors: Yeap, Yew Ming, Geddada, Nagesh, Satpathi, Kuntal, Ukil, Abhisek
• Format: Journal Article
• Language: English
• Published: Piscataway IEEE 01.10.2018; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Capacitors; Circuit faults; Computer simulation; Converters; Correlation analysis; Correlation coefficients; DC fault; dc-link capacitor; Direct current; Discharge; Discharges (electric); Fault currents; Fault detection; Fourier transforms; Frequency domain analysis; Line current; Methods; Parameter sensitivity; Quantitative analysis; Rings (mathematics); short-time Fourier transform (STFT); Time domain analysis; Voltage measurement; voltage-source converter (VSC); Wavelet analysis; wavelet transform (WT); Wavelet transforms
• ISSN: 1551-3203; 1941-0050
• DOI: 10.1109/TII.2018.2796068

The rapid discharge of a dc-link capacitor of the voltage-source converter (VSC)-based dc system is the primary indication of the fault condition. Apart from the time-domain analysis, frequency-domain analysis of the fault current could also be utilized for dc fault detection, as the rapidly rising fault current is expected to have high-frequency components. This paper proposes two fault detection methods and compares their performances with the wavelet transform. The first method is the time-domain analysis of the dc-link capacitor discharge and is termed as the capacitive discharge technique. The relationship between the dc line current and the behavior of the dc-link capacitor is measured in terms of a correlation coefficient, whose value can be used to establish a fault basis. The second method is the frequency-domain-based short-time Fourier transform, which is used for quantitative analysis of high-frequency components in the fault current. These methods are extensively analyzed and compared using a scaled-down VSC-based dc system experimental test setup. Comparison has been done based on fault detection time, sensitivity to fault parameters, influence of sampling frequency, and computation speed. Furthermore, the selectivity of the fault detection methods is studied on the multiterminal dc systems of two different topologies (ring and radial), modeled in PSCAD/EMTDC. The experimental and simulation results substantiate the applicability of all the methods to the dc system. Brief comparative analysis with the di/dt method is also presented to highlight the advantages of the proposed methods.