A Hardware-Software Blueprint for Flexible Deep Learning Specialization

This article describes the Versatile Tensor Accelerator (VTA), a programmable DL architecture designed to be extensible in the face of evolving workloads. VTA achieves “flexible specialization” via a parameterizable architecture, two-level Instruction Set Architecture (ISA), and a Just in Time (JIT)...

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Bibliographic Details
Published inIEEE MICRO Vol. 39; no. 5; pp. 8 - 16
Main Authors Moreau, Thierry, Chen, Tianqi, Vega, Luis, Roesch, Jared, Yan, Eddie, Zheng, Lianmin, Fromm, Josh, Jiang, Ziheng, Ceze, Luis, Guestrin, Carlos, Krishnamurthy, Arvind
Format Journal Article
LanguageEnglish
Published Los Alamitos IEEE 01.09.2019
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Architecture
Computational modeling
Computer architecture
Deep learning
Just in time
Machine learning
Runtime
Task analysis
Tensors
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Summary:This article describes the Versatile Tensor Accelerator (VTA), a programmable DL architecture designed to be extensible in the face of evolving workloads. VTA achieves “flexible specialization” via a parameterizable architecture, two-level Instruction Set Architecture (ISA), and a Just in Time (JIT) compiler.
ISSN:0272-1732
1937-4143
DOI:10.1109/MM.2019.2928962