A 0.8-V 82.9- \mu W In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver

In-ear brain-computer interface (BCI) controller system is implemented with a dedicated system-on-chip (SoC) including electroencephalography (EEG) readout and body channel communication (BCC) transceiver (TRX). The 8-mm 2 chip is fabricated using 65-nm CMOS and contains three key features: 1) curre...

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Published inIEEE journal of solid-state circuits Vol. 54; no. 4; pp. 1185 - 1195
Main Authors Lee, Jaehyuk, Lee, Kyoung-Rog, Ha, Unsoo, Kim, Ji-Hoon, Lee, Kwonjoon, Gweon, Surin, Jang, Jaeeun, Yoo, Hoi-Jun
Format Journal Article
LanguageEnglish
Published IEEE 01.04.2019
Subjects
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ISSN0018-9200
1558-173X
DOI10.1109/JSSC.2018.2888845

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Abstract In-ear brain-computer interface (BCI) controller system is implemented with a dedicated system-on-chip (SoC) including electroencephalography (EEG) readout and body channel communication (BCC) transceiver (TRX). The 8-mm 2 chip is fabricated using 65-nm CMOS and contains three key features: 1) current reusing low-noise amplifier (CRLNA) for low power; 2) bootstrapping dc servo loop (BDSL) enabling low-noise measurement even on 350-mV electrode dc offset (EDO); and 3) dual-mode programmable gain amplifier (DMPGA) that reduces TRX power consumption by activating only when the intentional blink is present. EEG instrumentation amplifier (IA) shows the state-of-the-art 8.8 power efficiency factor (PEF) performance, and the entire integrated circuit (IC) consumes 82.9 <inline-formula> <tex-math notation="LaTeX">\mu \text{W} </tex-math></inline-formula>. From the measurement, with nine subjects, the proposed BCI system accomplished 84% average accuracy for the binary selection task.
AbstractList In-ear brain-computer interface (BCI) controller system is implemented with a dedicated system-on-chip (SoC) including electroencephalography (EEG) readout and body channel communication (BCC) transceiver (TRX). The 8-mm 2 chip is fabricated using 65-nm CMOS and contains three key features: 1) current reusing low-noise amplifier (CRLNA) for low power; 2) bootstrapping dc servo loop (BDSL) enabling low-noise measurement even on 350-mV electrode dc offset (EDO); and 3) dual-mode programmable gain amplifier (DMPGA) that reduces TRX power consumption by activating only when the intentional blink is present. EEG instrumentation amplifier (IA) shows the state-of-the-art 8.8 power efficiency factor (PEF) performance, and the entire integrated circuit (IC) consumes 82.9 <inline-formula> <tex-math notation="LaTeX">\mu \text{W} </tex-math></inline-formula>. From the measurement, with nine subjects, the proposed BCI system accomplished 84% average accuracy for the binary selection task.
Author Lee, Kwonjoon
Jang, Jaeeun
Lee, Jaehyuk
Lee, Kyoung-Rog
Kim, Ji-Hoon
Ha, Unsoo
Gweon, Surin
Yoo, Hoi-Jun
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Snippet In-ear brain-computer interface (BCI) controller system is implemented with a dedicated system-on-chip (SoC) including electroencephalography (EEG) readout and...
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SubjectTerms Auditory steady-state response (ASSR)
body channel communication (BCC)
brain–computer interface (BCI)
current reusing
DSL
Ear
ear electroencephalography (EEG)
EEG
electrode dc offset (EDO)
Electrodes
Electroencephalography
Gain
instrumentation amplifier (IA)
Integrated circuits
operational transconductance amplifier (OTA)
Transistors
Title A 0.8-V 82.9- \mu W In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver
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