Generalized SAT-Attack-Resistant Logic Locking

• Published in: IEEE transactions on information forensics and security Vol. 16; pp. 2581 - 2592
• Main Authors: Zhou, Jingbo, Zhang, Xinmiao
• Format: Journal Article
• Language: English
• Published: IEEE 2021
• Subjects: Anti-SAT; AppSAT attack; Electronics packaging; hardware security; Integrated circuits; Logic gates; logic locking; removal attack; Resistance; Resists; Reverse engineering; SAT attack; Table lookup
• DOI: 10.1109/TIFS.2021.3059271
• ISSN: 1556-6013

Logic locking is used to protect integrated circuits (ICs) from piracy and counterfeiting. An encrypted IC implements the correct function only when the right key is input. Many existing logic-locking methods are subject to the powerful satisfiability (SAT)-based attack. Recently, an Anti-SAT scheme has been developed. By adopting two complementary logic blocks that consist of AND/NAND trees, it makes the number of iterations needed by the SAT attack exponential to the number of input bits. Nevertheless, the Anti-SAT scheme is vulnerable to the later AppSAT and removal attacks. This article proposes a generalized (G-)Anti-SAT scheme. Different from the Anti-SAT scheme, a variety of complementary or non-complementary functions can be adopted for the two blocks in our G-Anti-SAT scheme. The Anti-SAT scheme is just a special case of our proposed design. Our design can achieve higher output corruptibility, which is also tunable, so that better resistance to the AppSAT and removal attacks is achieved. Meanwhile, unlike existing AppSAT-resilient designs, our design does not sacrifice the resistance to the SAT attack.