Vertical Double-gate SiC/Si/SiC Quantum-well 1T DRAM and Its High-temperature Performances

• Published in: Journal of semiconductor technology and science Vol. 24; no. 5; pp. 483 - 490
• Main Authors: Kim, Soomin, Cho, Seongjae
• Format: Journal Article
• Language: English
• Published: 대한전자공학회 01.10.2024
• Subjects: 전기공학; sensing margin; quantum well; 1T DRAM; data retention; 3C-SiC; high temperature

In this work, a vertical double-gate 1T DRAM utilizing 3C-SiC/Si/3C-SiC quantum well is proposed to solve the inherent short retention time problem of conventional 1T DRAM. Superior properties of 3C-SiC, such as high thermal conductivity, high critical breakdown field, and large energy bandgap not o...