Self-injection-locked Divide-by-3 Frequency Divider with Improved Locking Range, Phase Noise, and Input Sensitivity
In this paper, we integrate a divide-by-3 injection-locked frequency divider (ILFD) in CMOS technology with a 0.18-μm BiCMOS process. We propose a self-injection technique that utilizes harmonic conversion to improve the locking range, phase-noise, and input sensitivity simultaneously. The proposed...
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Published in | Journal of semiconductor technology and science Vol. 17; no. 4; pp. 492 - 498 |
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Main Authors | , , , , |
Format | Journal Article |
Language | English |
Published |
대한전자공학회
01.08.2017
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Subjects | |
Online Access | Get full text |
ISSN | 1598-1657 2233-4866 |
DOI | 10.5573/JSTS.2017.17.4.492 |
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Abstract | In this paper, we integrate a divide-by-3 injection-locked frequency divider (ILFD) in CMOS technology with a 0.18-μm BiCMOS process. We propose a self-injection technique that utilizes harmonic conversion to improve the locking range, phase-noise, and input sensitivity simultaneously. The proposed self-injection technique consists of an odd-to-even harmonic converter and a feedback amplifier. This technique offers the advantage of increasing the injection efficiency at even harmonics and thus realizes the low-power implementation of an odd-order division ILFD. The measurement results using the proposed self-injection technique show that the locking range is increased by 47.8% and the phase noise is reduced by 14.7 dBc/Hz at 1-MHz offset frequency with the injection power of -12 dBm. The designed divide-by-3 ILFD occupies 0.048 mm2 with a power consumption of 18.2-mW from a 1.8-V power supply. KCI Citation Count: 0 |
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AbstractList | In this paper, we integrate a divide-by-3 injection-locked frequency divider (ILFD) in CMOS technology with a 0.18-μm BiCMOS process. We propose a self-injection technique that utilizes harmonic conversion to improve the locking range, phase-noise, and input sensitivity simultaneously. The proposed self-injection technique consists of an odd-to-even harmonic converter and a feedback amplifier. This technique offers the advantage of increasing the injection efficiency at even harmonics and thus realizes the low-power implementation of an odd-order division ILFD. The measurement results using the proposed self-injection technique show that the locking range is increased by 47.8% and the phase noise is reduced by 14.7 dBc/Hz at 1-MHz offset frequency with the injection power of -12 dBm. The designed divide-by-3 ILFD occupies 0.048 mm2 with a power consumption of 18.2-mW from a 1.8-V power supply. KCI Citation Count: 0 |
Author | Sanghun Lee Jusung Kim Sunhwan Jang Cam Nguyen Dae-Hyun Choi |
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Snippet | In this paper, we integrate a divide-by-3 injection-locked frequency divider (ILFD) in CMOS technology with a 0.18-μm BiCMOS process. We propose a... |
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Title | Self-injection-locked Divide-by-3 Frequency Divider with Improved Locking Range, Phase Noise, and Input Sensitivity |
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