Electrical Performance Depending on the Grain Boundary-location in the Multiple Nanosheet Tunneling Field-effect Transistor based on the Poly-Si

• Published in: Journal of semiconductor technology and science Vol. 23; no. 1; pp. 8 - 16
• Main Authors: Kang, Ga-Eon, Kang, In-Man, Lee, Sang-Ho, Park, Jin, Min, So-Ra, Kim, Geon-Uk, Heo, Jun-Hyeok, Jang, Jaewon, Bae, Jin-Hyuk, Lee, Sin-Hyung
• Format: Journal Article
• Language: English
• Published: 대한전자공학회 01.02.2023
• Subjects: 전기공학; polycrystalline silicon (Poly-Si); Multiple nanosheet tunneling field-effect transistor (MNSTFET); grain boundary (GB)

In this study, we present the electrical characteristics of the multiple nanosheet tunneling field-effect transistors (MNSTFETs) based on the polycrystalline silicon (poly-Si) depending on the grain boundary (GB)-locations. The effects of the GB are analyzed for 5 locations and they are compared wit...