A prototype scalable readout system for micro-pattern gas detectors

A scalable readout system (SRS) is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly consists of three kinds of modules: the ASIC card, the adapter card and the front-end card (FEC). The ASIC cards, mounted with particular ASI...

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Published inChinese physics C Vol. 40; no. 8; pp. 96 - 102
Main Author 郑其斌 刘树彬 田静 李诚 封常青 安琪
Format Journal Article
LanguageEnglish
Published 01.08.2016
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ISSN1674-1137
0254-3052
DOI10.1088/1674-1137/40/8/086101

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Abstract A scalable readout system (SRS) is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly consists of three kinds of modules: the ASIC card, the adapter card and the front-end card (FEC). The ASIC cards, mounted with particular ASIC chips, are designed for receiving detector signals. The adapter card is in charge of digitizing the output signals from several ASIC cards. The FEC, edged-mounted with the adapter, has field-programmable gate array (FPGA)-based reconfigurable logic and I/O interfaces, allowing users to choose different ASIC cards and adapters for different experiments, which expands the system to various applications. The FEC transfers data through Gigabit Ethernet protocol realized by a TCP processor (SiTCP) IP core in FPGA. By assembling a flexible number of FECs in parallel through Gigabit Ethernet, the readout system can be tailored to specific sizes to adapt to the experiment scales and readout requirements. In this paper, two kinds of multi-channel ASIC chip, VA140 and AGET, are applied to verify the scalability of this SRS architecture. Based on this VA140 or AGET SRS, one FEC covers 8 ASIC (VA140) cards handling 512 detector channels, or 4 ASIC (AGET) cards handling 256 detector channels, respectively. More FECs can be assembled in crates to handle thousands of detector channels.
AbstractList A scalable readout system (SRS) is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly consists of three kinds of modules: the ASIC card, the adapter card and the front-end card (FEC). The ASIC cards, mounted with particular ASIC chips, are designed for receiving detector signals. The adapter card is in charge of digitizing the output signals from several ASIC cards. The FEC, edged-mounted with the adapter, has field-programmable gate array (FPGA)-based reconfigurable logic and I/O interfaces, allowing users to choose different ASIC cards and adapters for different experiments, which expands the system to various applications. The FEC transfers data through Gigabit Ethernet protocol realized by a TCP processor (SiTCP) IP core in FPGA. By assembling a flexible number of FECs in parallel through Gigabit Ethernet, the readout system can be tailored to specific sizes to adapt to the experiment scales and readout requirements. In this paper, two kinds of multi-channel ASIC chip, VA140 and AGET, are applied to verify the scalability of this SRS architecture. Based on this VA140 or AGET SRS, one FEC covers 8 ASIC (VA140) cards handling 512 detector channels, or 4 ASIC (AGET) cards handling 256 detector channels, respectively. More FECs can be assembled in crates to handle thousands of detector channels.
A scalable readout system (SRS) is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly consists of three kinds of modules: the ASIC card, the adapter card and the front-end card (FEC). The ASIC cards, mounted with particular ASIC chips, are designed for receiving detector signals. The adapter card is in charge of digitizing the output signals from several ASIC cards. The FEC, edged-mounted with the adapter, has field-programmable gate array (FPGA)-based reconfigurable logic and I/O interfaces, allowing users to choose different ASIC cards and adapters for different experiments, which expands the system to various applications. The FEC transfers data through Gigabit Ethernet protocol realized by a TCP processor (SiTCP) IP core in FPGA. By assembling a flexible number of FECs in parallel through Gigabit Ethernet, the readout system can be tailored to specific sizes to adapt to the experiment scales and readout requirements. In this paper, two kinds of multi-channel ASIC chip, VA140 and AGET, are applied to verify the scalability of this SRS architecture. Based on this VA140 or AGET SRS, one FEC covers 8 ASIC (VA140) cards handling 512 detector channels, or 4 ASIC (AGET) cards handling 256 detector channels, respectively. More FECs can be assembled in crates to handle thousands of detector channels.
Author 郑其斌 刘树彬 田静 李诚 封常青 安琪
AuthorAffiliation Department of Modern Physics, University of Science and Technology of China, Hefei 230026, China State Key Laboratory of Particle Detection and Electronics (IHEP-USTC), Hefei 230026, China
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10.1016/S0168-9002(96)01172-2
10.1088/1748-0221/8/03/C03015
10.1109/NSSMIC.2011.6154095
10.1016/j.nima.2011.01.163
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10.1016/j.nima.2007.03.026
10.1016/0168-9002(96)00175-1
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Notes 11-5641/O4
A scalable readout system (SRS) is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly consists of three kinds of modules: the ASIC card, the adapter card and the front-end card (FEC). The ASIC cards, mounted with particular ASIC chips, are designed for receiving detector signals. The adapter card is in charge of digitizing the output signals from several ASIC cards. The FEC, edged-mounted with the adapter, has field-programmable gate array (FPGA)-based reconfigurable logic and I/O interfaces, allowing users to choose different ASIC cards and adapters for different experiments, which expands the system to various applications. The FEC transfers data through Gigabit Ethernet protocol realized by a TCP processor (SiTCP) IP core in FPGA. By assembling a flexible number of FECs in parallel through Gigabit Ethernet, the readout system can be tailored to specific sizes to adapt to the experiment scales and readout requirements. In this paper, two kinds of multi-channel ASIC chip, VA140 and AGET, are applied to verify the scalability of this SRS architecture. Based on this VA140 or AGET SRS, one FEC covers 8 ASIC (VA140) cards handling 512 detector channels, or 4 ASIC (AGET) cards handling 256 detector channels, respectively. More FECs can be assembled in crates to handle thousands of detector channels.
scalable readout system (SRS), micro-pattern gas detectors (MPGD), charge measurement, front-endelectronics, VA140, AGET
Qi-BinZheng, Shu-BinLiu, JingTian, Cheng Li, Chang-Qing Feng, Qi An(1Department of Modern Physics, University of Science and Technology of China, Hefei 230026, China 2State Key Laboratory of Particle Detection and Electronics (IHEP-USTC), Hefei 230026, China)
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Snippet A scalable readout system (SRS) is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly...
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SubjectTerms Adapters
ASIC芯片
Cards
Channels
Chips
Detectors
Ethernet
Field programmable gate arrays
FPGA处理器
Microprocessors
千兆以太网
可扩展性
气体探测器
现场可编程门阵列
读出系统
集成电路卡
Title A prototype scalable readout system for micro-pattern gas detectors
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