Efficient and Low-Cost Metal Revision Techniques for Post Silicon Repair
New effective techniques to repair “small” design errors in integrated circuits are presented. As semiconductor chip complexity increases and the design period becomes tight, errors frequently remain in a fabricated chip making revisions required. Full mask revision significantly increases the cost...
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Published in | Journal of semiconductor technology and science Vol. 14; no. 3; pp. 322 - 330 |
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Main Authors | , |
Format | Journal Article |
Language | English |
Published |
대한전자공학회
01.06.2014
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Abstract | New effective techniques to repair “small” design errors in integrated circuits are presented. As semiconductor chip complexity increases and the design period becomes tight, errors frequently remain in a fabricated chip making revisions required. Full mask revision significantly increases the cost and time-to-market. However, since many “small” errors can be repaired by modifying several connections among the circuit blocks and spare cells, errors can frequently be repaired by revising metal layers. Metal only revision takes significantly less time and involves less cost when compared to full mask revision, since mask revision costs multi-million dollars while metal revision costs tens of thousand dollars. In our research, new techniques are developed to further reduce the number of metal layers to be revised. Specifically, we partition the circuit blocks with higher error probabilities and extend the terminals of the signals crossing the partition boundaries to the preselected metal repair layers. Our partitioning and pin extension to repair layers can significantly improve the repairability by revising only the metal repair layers. Since pin extension may increase delay slightly, this method can be used for non-timing-critical parts of circuits. Experimental results by using academia and industrial circuits show that the revision of the two metal layers can repair many “small” errors at low-cost and with short revision time. On the average, when 11.64% of the spare cell area and 24.72% of the extended pins are added to the original circuits, 83.74% of the single errors (and 72.22% of the double errors) can be corrected by using two metal revision. We also suggest methods to use our repair techniques with normal commercial vender tools. KCI Citation Count: 0 |
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AbstractList | New effective techniques to repair “small” design errors in integrated circuits are presented. As semiconductor chip complexity increases and the design period becomes tight, errors frequently remain in a fabricated chip making revisions required. Full mask revision significantly increases the cost and time-to-market. However, since many “small” errors can be repaired by modifying several connections among the circuit blocks and spare cells, errors can frequently be repaired by revising metal layers. Metal only revision takes significantly less time and involves less cost when compared to full mask revision, since mask revision costs multi-million dollars while metal revision costs tens of thousand dollars. In our research, new techniques are developed to further reduce the number of metal layers to be revised. Specifically, we partition the circuit blocks with higher error probabilities and extend the terminals of the signals crossing the partition boundaries to the preselected metal repair layers. Our partitioning and pin extension to repair layers can significantly improve the repairability by revising only the metal repair layers. Since pin extension may increase delay slightly, this method can be used for non-timing-critical parts of circuits. Experimental results by using academia and industrial circuits show that the revision of the two metal layers can repair many “small” errors at low-cost and with short revision time. On the average, when 11.64% of the spare cell area and 24.72% of the extended pins are added to the original circuits, 83.74% of the single errors (and 72.22% of the double errors) can be corrected by using two metal revision. We also suggest methods to use our repair techniques with normal commercial vender tools. KCI Citation Count: 0 |
Author | Hyunchul Shin Sungchul Lee |
Author_xml | – sequence: 1 givenname: Sungchul surname: Lee fullname: Lee, Sungchul – sequence: 2 givenname: Hyunchul surname: Shin fullname: Shin, Hyunchul |
BackLink | https://www.kci.go.kr/kciportal/ci/sereArticleSearch/ciSereArtiView.kci?sereArticleSearchBean.artiId=ART001887504$$DAccess content in National Research Foundation of Korea (NRF) |
BookMark | eNo9kE1PAjEYhBuDiYD-AU97MfGya79390gQBYNiYD033W6rFdxiu2j89xYhJpPM4X1mkncGoNe6VgNwiWDGWE5uHlbVKsMQ0SyKZATjE9DHmJCUFpz3QB-xskgRZ_kZGITwDiEv8jLvg-nEGKusbrtEtk0yd9_p2IUuedSd3CRL_WWDdW1SafXW2s-dDolxPnneIyu7sSrelnorrT8Hp0Zugr44-hC83E2q8TSdL-5n49E8VZijLqWm4VLzmpMG57qGkjNpeIEohayGpsSaKd00qqAKFmVNcpLjRpfUoEZhXWMyBNeH3tYbsVZWOGn__NWJtRejZTUT8WVCUUTxAVXeheC1EVtvP6T_EQiK_WxiP5vYzyaiiIizxdDVsX8XYd1Y-Z96WtxOIGYQoQKSXxDibrA |
Cites_doi | 10.1109/43.3141 |
ContentType | Journal Article |
DBID | DBRKI TDB AAYXX CITATION ACYCR |
DOI | 10.5573/JSTS.2014.14.3.322 |
DatabaseName | DBPIA - 디비피아 Nurimedia DBPIA Journals CrossRef Korean Citation Index |
DatabaseTitle | CrossRef |
DatabaseTitleList | |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Engineering |
EISSN | 2233-4866 |
EndPage | 330 |
ExternalDocumentID | oai_kci_go_kr_ARTI_866341 10_5573_JSTS_2014_14_3_322 NODE02501180 |
GroupedDBID | 9ZL ADDVE AENEX ALMA_UNASSIGNED_HOLDINGS C1A DBRKI FRP GW5 HH5 JDI KVFHK MZR OK1 TDB TR2 ZZE AAYXX CITATION ACYCR |
ID | FETCH-LOGICAL-c261t-4fd6ae6b63d27eb0a65af6814405b0f92e5ceddc84c089b37372de94f1dc2eb23 |
ISSN | 1598-1657 |
IngestDate | Sun Mar 09 07:52:04 EDT 2025 Tue Jul 01 02:28:31 EDT 2025 Thu Mar 13 19:39:47 EDT 2025 |
IsPeerReviewed | false |
IsScholarly | true |
Issue | 3 |
Keywords | post-silicon partition pin extension Repair revision |
Language | English |
LinkModel | OpenURL |
MergedId | FETCHMERGED-LOGICAL-c261t-4fd6ae6b63d27eb0a65af6814405b0f92e5ceddc84c089b37372de94f1dc2eb23 |
Notes | G704-002163.2014.14.3.004 |
PageCount | 9 |
ParticipantIDs | nrf_kci_oai_kci_go_kr_ARTI_866341 crossref_primary_10_5573_JSTS_2014_14_3_322 nurimedia_primary_NODE02501180 |
ProviderPackageCode | CITATION AAYXX |
PublicationCentury | 2000 |
PublicationDate | 2014-06-01 |
PublicationDateYYYYMMDD | 2014-06-01 |
PublicationDate_xml | – month: 06 year: 2014 text: 2014-06-01 day: 01 |
PublicationDecade | 2010 |
PublicationTitle | Journal of semiconductor technology and science |
PublicationYear | 2014 |
Publisher | 대한전자공학회 |
Publisher_xml | – name: 대한전자공학회 |
References | (E1STAN_2014_v14n3_322_009) 1988; 7 |
References_xml | – volume: 7 start-page: 138 year: 1988 ident: E1STAN_2014_v14n3_322_009 publication-title: IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems doi: 10.1109/43.3141 |
SSID | ssj0068797 |
Score | 1.9065219 |
Snippet | New effective techniques to repair “small” design errors in integrated circuits are presented. As semiconductor chip complexity increases and the design period... |
SourceID | nrf crossref nurimedia |
SourceType | Open Website Index Database Publisher |
StartPage | 322 |
SubjectTerms | 전기공학 |
Title | Efficient and Low-Cost Metal Revision Techniques for Post Silicon Repair |
URI | https://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE02501180 https://www.kci.go.kr/kciportal/ci/sereArticleSearch/ciSereArtiView.kci?sereArticleSearchBean.artiId=ART001887504 |
Volume | 14 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
ispartofPNX | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2014, 14(3), 57, pp.322-330 |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwnV3JbtswECWc9ND2UHRF3SVggepkyFVEauHRVlS4RZIenAC5ERZJJUYCKXBkFO2pn94Zak0XdLnQBC2KxswzOTMcPhLy1tc88jXLXRZ6kcuV0m5mAh-DOIAeprVQGNA_Og4Xp_zjWXA2Gn0bZC1tq2yqvv7yXMn_aBXaQK94SvYfNNu9FBqgDvqFEjQM5V_pOLX8D22W-GH52U3Km2pyZKqGMh9DYXX0HGlaLfWCvZ53slxfAQQwen-9Wm9-Y6HeYOJ8WSAjLOYidkF4O1qzdPabSsW5utheTQ5ND5UvsGhi2_Ki4fduwgv7vE-DsoBw0rkTJ5h1kR44InBE4qSJM_OcmGNFpI6Ar2bOnDnzoH1G2MoMOg5nVgHualizUU-NbQPThLk8rq9d6aZjPoAdG8ytrD7A3CzTrN7O-XEFCIIImShgVlti3h6HlWDKpl3XW8zax58OUjQBkQVvh9zxwdGwqaGLzoEK46i-nqf98fWxKxzk3c9D3DJtdooNlHeLLd7SAH_1gdVy8pA8aJRJZzV2HpGRKR6T-wMSyidk0aGIgl5piyJqUURbFNEeRRRQRBFFtEERrVH0lJy-T0-Shdvcr-Eq8Jsrl-c6XJkwC5n2I5N5qzBY5WGM2_1B5uXCN4EyWquYKy8WGcMbjbQRPN_XyjeZz56R3aIszHNCucbtdaE9lUN3nwm1ClUulAFrFHwMMSaTVjTyuqZRkeB-oiAlClKiIMENlUyCIMfkDUhPXqq1RPZz_Dwv5eVGgo_3QQJewPQak71Ott0rhxp98acHXpJ7PeBfkd1qszWvwcKssj0Lgu_dOHHY |
linkProvider | ABC ChemistRy |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Efficient+and+Low-Cost+Metal+Revision+Techniques+for+Post+Silicon+Repair&rft.jtitle=Journal+of+semiconductor+technology+and+science&rft.au=Sungchul+Lee&rft.au=Hyunchul+Shin&rft.date=2014-06-01&rft.pub=%EB%8C%80%ED%95%9C%EC%A0%84%EC%9E%90%EA%B3%B5%ED%95%99%ED%9A%8C&rft.issn=1598-1657&rft.eissn=2233-4866&rft.volume=14&rft.issue=3&rft.spage=322&rft.epage=330&rft_id=info:doi/10.5573%2FJSTS.2014.14.3.322&rft.externalDocID=NODE02501180 |
thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1598-1657&client=summon |
thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1598-1657&client=summon |
thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1598-1657&client=summon |