蔡琪玉, 程. 蒋. (2009). DC Gain Analysis of Scaled CMOS Op Amp in Sub-100 nm Technology Nodes： A Research Based on Channel Length Modulation Effect. Shanghai jiao tong da xue xue bao, 14(5), 613-619. https://doi.org/10.1007/s12204-009-0613-2
Chicago Style (17th ed.) Citation蔡琪玉, 程嘉 蒋建飞. "DC Gain Analysis of Scaled CMOS Op Amp in Sub-100 Nm Technology Nodes： A Research Based on Channel Length Modulation Effect." Shanghai Jiao Tong Da Xue Xue Bao 14, no. 5 (2009): 613-619. https://doi.org/10.1007/s12204-009-0613-2.
MLA (9th ed.) Citation蔡琪玉, 程嘉 蒋建飞. "DC Gain Analysis of Scaled CMOS Op Amp in Sub-100 Nm Technology Nodes： A Research Based on Channel Length Modulation Effect." Shanghai Jiao Tong Da Xue Xue Bao, vol. 14, no. 5, 2009, pp. 613-619, https://doi.org/10.1007/s12204-009-0613-2.